version 2.0 rev 18 Feb 2021
16
Horizontal Scan Circuit
Vertical Scan Cir
cuit
APS with column A/D
Photo Ampl Switches
SECTION 2: FEATURES AND FUNCTIONALITY
2.1 sCMOS Structure and Operation
sCMOS technology has been developed specifically to overcome many of the limitations that have marred
other scientific detector technologies, resulting in an imaging detector that provides exceptional performance
for many applications.
Figure 7: sCMOS Sensor Architecture
As illustrated above, the CMOS sensor is an “
A
ctive
P
ixel
S
ensor” (
APS
) whereby each pixel has its own integral
amplifier and the sequence of operation is as follows:
1. Light hits sensor and generates charge
2. The photo-generated charge is converted to an analog voltage inside each pixel amplifier
3. Pixel voltage is transferred to the column bus via a row select signal
4. The analog voltage is then converted to a digital signal via columns of A/D (analog to digital) converters.
5. The final digitized signals are then read out sequentially at a pixel readout speed of up to 280 MHz
for the Zyla 5.5 and 270 MHz for the Zyla 4.2 (in x2 halves).
NOTES:
The diagram, above is representative- the light sensitive area is contiguous as the photodiodes for each
pixel are buried within the sensor. Each pixel also has a microlens to maximize sensitivity to light.
For Rolling Shutter mode operation, pixels in each row are exposed and the charge converted to a voltage
simultaneously before being digitized then read out sequentially
For Global Shutter mode, each pixel in the sensor begins an exposure simultaneously and then ends this
exposure simultaneously
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2
3
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5
Summary of Contents for Zyla sCMOS 4.2 PLUS
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