System Architecture
2-2
ADSP-BF707 EZ-KIT Lite Evaluation System Manual
System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite
board (
).
This EZ-KIT Lite is designed to demonstrate the ADSP-BF707 proces-
sor’s capabilities. The ADSP-BF707 EZ-KIT Lite has a 25 MHz input
clock and runs at 400 MHz internally.
USB circuitry and a micro USB AB connector are provided for connecting
to the EZ-KIT Lite as a host or a device. The frequency for the USB cir-
cuit is generated by an external 24 MHz oscillator.
Figure 2-1. EZ-KIT Lite Block Diagram
ADSP-BF707
BGA 400MHz
LEDs (3)
D
e
b
ug
Po
rt
SPI2
25 MHz
Oscillator
PBs (2)
CL
K
IN
GP
IO
UART0
USB0
USB otg
CAN0
CAN
RJ11
JTAG/SWD/SWO
10 pin 0.05"
CAN1
CAN
RJ11
NXP
TJA1041
NXP
TJA1041
EI3 (1A , 1B, 1C)
TRACE
38 pin mictor
DMC0
32 Mbit Quad
SPI Flash
2GB
DDR2
SD/MMC
Conn
MSI0
RF Wireless
SPI2
RTC
16mm
battery
holder
ADP5024
5V
1.8V
1.1V
3.3V
FTDI
FT232RQ
USB
24 MHz
Oscillator
32.768 kHz
Oscillator
Summary of Contents for EZ-KIT Lite ADSP-BF707
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Page 60: ...Connectors 2 26 ADSP BF707 EZ KIT Lite Evaluation System Manual ...
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Page 85: ...Index I 4 ADSP BF707 EZ KIT Lite Evaluation System Manual ...