EVAL-AD7276SDZ User Guide
UG-450
Rev. 0 | Page 9 of 20
LINK CONFIGURATION OPTIONS
There are multiple jumper (LKx) options that must be set
correctly to select the appropriate operating setup before you
begin using the evaluation board. The functions of these
options are outlined in Table 2.
SETUP CONDITIONS
Care should be taken before applying power and signals to the
evaluation board to ensure that all link positions are as required
by the operating mode. There are two modes in which to operate
the evaluation board. The evaluation board can be operated in
SDP controlled mode to be used with the SDP board, or the
evaluation board can be used in standalone mode.
Table 3 shows the default positions in which the links are set when
the evaluation board is packaged. When the board is shipped, it
is assumed that you are going to operate the evaluation board
with the SDP board (SDP controlled mode).
Table 2. Link Option Functions
Link No.
Function
LK1
−AMP. Amplifier negative voltage supply selection.
Position A: the amplifier negative voltage is supplied from the on-board supply.
Position B: the amplifier negative voltage is supplied from an external source via J3 Terminal 1.
LK2
+AMP. Amplifier positive voltage supply selection.
Position A: the amplifier positive voltage is supplied from the on-board supply.
Position B: the amplifier positive voltage is supplied from an external source via J3 Terminal 3.
LK3
Bias-up voltage selection. Selects the voltage level that is supplied to U4.
Position A: the bias-up voltage level that is supplied to U4 is V
DD
.
Position B: the bias-up voltage level that is supplied to U4 is 0 V.
LK4
V
DD
source selection.
Position A: V
DD
is sourced from U5.
Position B: V
DD
is sourced externally via J4.
LK5
U5 output voltage selection.
Inserted: the U5 output voltage is 3.0 V.
Removed: the U5 output voltage is 2.5 V.
LK6
V
IN
unbiased input impedance selection.
Inserted: the V
IN
unbiased input impedance is 51 Ω.
LK7
CS signal.
Position A: the CS signal is connected to
EVAL-SDP-CB1Z
.
Position B: the CS signal is connected externally via J6.
LK8
Biased-up input signal.
Inserted: the biased-up input signal is connected to the U7 input buffer.
LK9
SCLK signal.
Position A: the SCLK signal is connected to
EVAL-SDP-CB1Z
.
Position B: the SCLK signal is connected externally via J8.
LK10
Buffer input source.
Position A: the input signal is connected to the U7 input buffer.
Position B: the input signal connected to the U7 input buffer is set to 0 V.
LK11
V
IN
input impedance selection.
Inserted: the V
IN
input impedance is 51 Ω.
LK12
SDATA signal.
Position A: the SDATA signal is connected to
EVAL-SDP-CB1Z
.
Position B: the SDATA signal is connected externally via J9.
Table 3. Default Link Positions for Packaged
EVAL-AD7276SDZ
Link No.
Position
Function
LK1
A
The amplifier negative voltage is supplied from the on-board supply.
LK2
A
The amplifier positive voltage is supplied from the on-board supply.
LK3
A
The selected voltage level that is supplied to U4 is V
DD
.
LK4
A
V
DD
is sourced from U5.
