UG-849
EVAL-AD7177-2SDZ User Guide
Rev. 0 | Page 4 of 14
EVALUATION BOARD HARDWARE
DEVICE DESCRIPTION
The
AD7177-2
is a highly accurate, high resolution, multiplexed,
2-/4-channel (fully differential/single-ended) Σ-Δ ADC. The
AD7177-2
has a maximum channel-to-channel scan rate of
10 kSPS (100 µs) for fully settled data. The output data rates
range from 5 SPS to 10 kSPS. The device includes integrated rail-
to-rail analog input and reference input buffers, an integrated
precision 2.5 V reference, and an integrated oscillator.
See the
AD7177-2
data sheet for complete specifications. Consult
the data sheet in conjunction with this user guide when using
the evaluation board. Full details for the
EVAL-SDP-CB1Z
are
available at the SDP-B product page on the Analog Devices website.
HARDWARE LINK OPTIONS
See Table 1 for default link options. By default, the evaluation
board is configured to operate from the supplied 9 V ac-to-dc
adapter connected to connector J5. The 5 V supply required for
the
AD7177-2
comes from the
ADP7118
on-board low dropout
regulator (LDO). The
ADP7118
, with a 5 V output voltage,
receives its input voltage from J3 or J5 (depending on the
position of LK2) and generates a 5 V output.
Table 1. Default Link and Solder Link Options
Link
Default
Option
Description
LK1
A
Selects the voltage applied to the power supply sequencer circuit (U3); dependent on AVDD1. Place in
Position A if using 5 V AVDD1, or Position B if using 2.5 V AVDD1.
LK2
B
Selects the external power supply from Connector J3 (Position A) or Connector J5 (Position B).
LK3 to LK7
Not inserted Inserting these links sets up the on-board noise test prior to SL8 to SL11 to allow the inputs to the on-board
amplifiers, U8 and U9, to be shorted. In this mode, all inputs short to REFOUT.
LK8 to LK12 Inserted
Inserting these links sets up the on-board noise test close to the ADC analog inputs. In this mode, all inputs
short to REFOUT.
SL1
A
Sets the voltage applied to the AVDD2 pin. Operates using the AVDD1 supply (default). Position B sets the
AVDD2 voltage to 3.3 V supply from the
ADP7118
(3.3 V) (U10) regulator.
SL2
A
Selects between an external or on-board AVDD1 source. Supplies AVDD1 from the
ADP7118
(5 V) (U7) (default).
SL3
A
Selects between an external or on-board AVSS source. Supplies AVSS from the
ADP7182
(−2.5 V) (U4) (default).
SL4
C
Connects AIN4 to: A4/J6 (Position A), REFOUT pin on the
AD7177-2
(Position B), or AVSS (Position C).
Position B and Position C are used to simplify using a single-ended input source.
SL5
B
Selects between an external or on-board IOVDD source. Supplies IOVDD from the
ADP7118
(3.3 V) (U10)
(default). The evaluation board operates with a 3.3 V logic.
SL8
A
Routes A0 to: AIN0 pin on the
AD7177-2
(Position A), Buffer/In-amp U8 (Position B), Funnel Amp U9 with gain
of 0.8× (Position C), or J10-1 (Position D).
SL9
A
Routes A2 to: AIN2 pin on the
AD7177-2
(Position A), Buffer U12 (Position B), or Funnel Amp U9 gain of 0.4×
(Position C).
SL10
A
Routes A3 to: AIN3 pin on the
AD7177-2
(Position A), Buffer U12 (Position B), or Funnel Amp U9 gain of 0.4×
(Position C).
SL11
A
Routes A1 to: AIN1 pin on the
AD7177-2
(Position A), Buffer/In-amp U8 (Position B), Funnel Amp U9 with gain
of 0.8× (Position C), or J10-7 (Position D).
G16
Inserted
Sets the on-board In-amp (U8) to a gain of 16. Only one of G16, G32, G64, and G128 should be inserted at a time.
G32
Not inserted Sets the on-board In-amp (U8) to a gain of 32. Only one of G16, G32, G64, and G128 should be inserted at a time.
G64
Not inserted Sets the on-board In-amp (U8) to a gain of 64. Only one of G16, G32, G64, and G128 should be inserted at a time.
G128
Not inserted Sets the on-board In-amp (U8) to a gain of 128. Only one of G16, G32, G64, and G128 should be inserted at a time.
R49 to R51
Inserted
Connects AVSS and AGND for single-supply operation. To operate in split supply mode, remove these links.
