ADV7619 Required Settings Manual
ADV7619 Reference Manual
Rev. 1.8 | Page 7 of 14
3
TMDS EQUALIZER SETTINGS
Different register settings are required to configure the TMDS Equalizer depending on the resolution received. These required settings are
listed below for the respective resolutions.
3.1
INPUT VIDEO PIXEL CLOCK FREQUENCY ≤ 170MHZ
The following two categories of settings are required for input video resolutions with a pixel clock of less than or equal to 170 MHz.
3.1.1
480i, 576i, 480p and 576p Resolutions up to a 36-bit color depth
The following settings are required to configure the TMDS Equalizer for the 480i, 576i, 480p and 576p resolutions with color depths between
24-bit and 36-bit.
HDMI Map
68 85 11
ADI Required Write
68 86 9B
ADI Required Write
68 89 03
ADI Required Write
68 9B 03
ADI Required Write
68 93 03
ADI Required Write
68 5A 80
ADI Required Write
68 9C 80
ADI Required Write
68 9C C0
ADI Required Write
68 9C 00
ADI Required Write
3.1.2
720p, 1080i and 1080p Resolutions up to a 36-bit color depth
The following settings are required to configure the TMDS Equalizer for the 720p, 1080i, 1080p resolutions with color depths between 24-bit
and 36-bit.
HDMI Map
68 85 10
ADI Required Write
68 86 9B
ADI Required Write
68 89 03
ADI Required Write
68 9B 03
ADI Required Write
68 93 03
ADI Required Write
68 5A 80
ADI Required Write
68 9C 80
ADI Required Write
68 9C C0
ADI Required Write
68 9C 00
ADI Required Write