background image

EVAL-AD5696RSDZ User Guide 

UG-726 

 

Rev. C | Page 9 of 13 

12475-

007

IF VCC WILL BE USED TO POWER THE MODULE, PROVIDE PROTECTION CIRCUIT BLOCK IF POSSIBLE

CONNECT VCC TO 3.3V DIGITAL REFERENCE OR LEAVE FLOATING

CONNECT P1-P4 AND P7-P10 TO SIGNAL BUSES FOR SPI

PMOD INTERFACE TYPE 2A (EXPANDED SPI)

SYNCB_SCL

SDIN_A1

LDACB

DNI

SCLK_A0

SDO_SDA

GAIN

RESETB

RSTSEL

TSW-106-08-G-D

VIO

VDD

PMOD

5

11

1
2
3
4

7
8
9
10

6

12

VCC

GND

P10

P9

P8

P7

VCC

GND

P4

P3

P2

P1

DGND

DGND

HIGH OR LOW BY YOUR BOARD AT POWER UP. FAILURE TO MEET THIS

AN ACTIVE LOW CHIP SELECT. ENSURE ALSO THAT THE SPI CLK LINE IS NOT HELD

IS NOT ACTIVELY DRIVING THE MISO DATA LINE UNLESS PROPERLY ADDRESSED WITH

SINCE SPI IS A SHARED BUS, ENSURE THAT ANY SPI DEVICE ON DAUGHTER BOARD

ON THE SPI_SEL_A/B/C LINES THAT ARE ACTIVE LOW ENABLED

WHEN USING SPI INTERFACE, BE AWARE OF ADDING A PULL UP

THE SDP REQUIRES 5V 300MA

MAIN 12C BUS (CONNECTED TO BLACKFIN TWI - PULL UP RESISTORS NOT REQUIRED

SPI_SEL1/SPI_SS MUST BE ONLY USED

GPIO - USE 12C_0 FIRST)

REQUIRED (CONNECTED TO BLACKFIN

CONNECTORS ON SDP - PULL UP RESISTORS

THE SDP CONNECTOR IMPLEMENTS THE E13 CONNECTOR SPECIFICATIONS STANDARD. THIS IS A STANDARD FOR USE ACROSS ADI AND CANNOT BE MODIFIED

12C BUS 1 IS COMMON ACROSS BOTH

VIO: USE TO SET IO VOLTAGE MAX DRAW 20MA

: USE ONLY TO POWER THE EEPROM(3MA MAX DRAW)

VIN: USE THIS PIN TO POWER

BOARD ID EEPROM (24LC32) MUST BE ON I2C BUS 0

WITH EXTERNAL SPI FLASH

TO BOOT FROM A SPI FLASH ON THE DAUGHTER BOARD

BMODE1: PULL UP WITH A 10K RESISTOR TO SET SDP

RESULT TO A NON-FUNCTIONAL SYSTEM.

114

69

52

SDP CONNECTOR

R20

SCLK

100

R13

118
119

FX8-120S-SV(21)

C22

1.8

2

E1

107
108
109

10UF

600OHM

SDA_0

R0603

DNI

100K

R0603

SDIN

R0603

TOL=1

100K

DNI

SDO

SCL_0

RSTSEL

LDACB

A1

A0

RESETB

GAIN

TOL=1

100K

TOL=1

R0603

100K

VIO

0

VIO

USB_SUPPLY

EEPROM

24LC32A-I/ST

10UF

TSSOP8

0.1UF

SYNCB

VIO

0.1UF

4.7UF

SDP

61

71

56

3

4

6

11

17

23

28

36

40

46

58

63

75

81

86

93

98

104

115

117

43

78

44

77

45

76

47

74

2

50

51

53

54

55

66
67
68

70

120

96

25

97

24

94

22

101

20

102

19

103

18

105

16

106

15
14
13
12

110
111

10

112

9

113

8
7

27

95

26

99

21

60

57

79

42

80

41

35

64

82

33

34

83
84

39

85

37

38

91

31

88

32

90

92

29

30

89

87

48

73

49

72

59

62

5

1

116

65

U1

1
2
3
6

5

8

4

7

R2

R3

R1

C25

C24

P

N

R12

C21

C23

1

DGND

DGND

DGND

DGND

AGND

AGND

VSS

VCC

WP

A2

A1

A0

SCL

SDA

DGND

DGND

DGND

SPI_SEL_A

CLKOUT

NC

NC

GND

GND

VIO(+3.3V)

GND

PAR_D22

PAR_D20

PAR_D18

PAR_D16

PAR_D15

GND

PAR_D12

PAR_D10

PAR_D8

PAR_D6

GND

PAR_D4

PAR_D2

PAR_D0

PAR_WR_N

PAR_INT

GND

PAR_A2

PAR_A0

PAR_FS2

PAR_CLK

GND

SPORT_RSCLK

SPORT_DR0

SPORT_RFS

SPORT_TFS

SPORT_DT0

SPORT_TSCLK

GND

SPI_MOSI

SPI_MISO

SPI_CLK

GND

SDA_0

SCL_0

GPIO1

GPIO3

GPIO5

GND

GPIO7

TMR_B

TMR_D

NC

GND

NC

NC

NC

WAKE_N

SLEEP_N

GND

UART_TX

BMODE1

RESET_IN_N

UART_RX

GND

RESET_OUT_N

EEPROM_A0

NC

NC

NC

GND

NC

NC

TMR_C

TMR_A

GPIO6

GND

GPIO4

GPIO2

GPIO0

SCL_1

SDA_1

GND

SPI_SEL1/SPI_SS_N

SPI_SEL_C_N

SPI_SEL_B_N

GND

SERIAL_INT

SPI_D3

SPI_D2

SPORT_DT1

SPORT_DR1

SPORT_TDV1

SPORT_TDV0

GND

PAR_FS1

PAR_FS3

PAR_A1

PAR_A3

GND

PAR_CS_N

PAR_RD_N

PAR_D1

PAR_D3

PAR_D5

GND

PAR_D7

PAR_D9

PAR_D11

PAR_D13

PAR_D14

GND

PAR_D17

PAR_D19

PAR_D21

PAR_D23

GND

USB_VBUS

GND

GND

NC

VIN

 

Figure 8. 

EVAL-AD5696RSDZ

 Schematic—SDP Connector 

Summary of Contents for AD5696RSDZ

Page 1: ...a single 2 7 V to 5 5 V supply The AD5696R incorporates an internal 2 5 V reference to give an output voltage of 2 5 V or 5 V The EVAL AD5696RSDZ evaluation board also incorporates additional voltage references The EVAL AD5696RSDZ interfaces to the USB port of a PC via a system demonstration platform SDP board The analysis control evaluation ACE software is available for download from the EVAL AD5...

Page 2: ... Installing the Software Section Initial Setup Section Figure 2 and Figure 3 Renumbered Sequentially 3 Added Block Diagram and Description Section Figure 4 and Table 1 Renumbered Sequentially 4 Deleted Evaluation Board Software Section Installing the Software Section Running the Software Section Figure 2 Figure 3 Figure 4 and Figure 5 Renumbered Sequentially 5 Added Memory Map Section Figure 5 and...

Page 3: ... use this software see the ACE software page on the Analog Devices website After the installation is finished the EVAL AD5696RSDZ evaluation board plug in appears when the ACE software is opened INITIAL SETUP To set up the evaluation board take the following steps 1 Connect the evaluation board to the SDP board and then connect the USB cable between the SDP board and the PC 2 Run the ACE applicati...

Page 4: ... menu selects how the data being transferred to the device affects the input and DAC registers After a data value is entered in an input register D this menu determines the internal DAC registers affected by updating the input register D After a new value is written in the input register D the data can be transferred to the DAC input register or to the DAC input register and the DAC register simul...

Page 5: ...are toggled Clicking the Apply Changes button transfers data to the device All changes made in the memory map tab correspond to the block diagram For example if the internal register bit is enabled it displays as enabled on the block diagram Any bits or registers that are shown in bold in the memory map tab are modified values that have not been transferred to the evaluation board see Figure 6 Cli...

Page 6: ... operating conditions before using the board The functions of these link options are described in Table 4 Table 3 lists the positions of the different links controlled by the PC via the USB port An SDP board operating in single supply mode is required Table 2 Power Supply Connectors Connector No Label External Voltage Supplies Description EXTSUP Pin 1 EXTSUP External analog power supply from 2 7 V...

Page 7: ...ternal pull up resistor This signal is named SDO_SDA in Figure 7 If using an external microcontroller a 2 2 kΩ pull up resistor connected to VLOGIC is required SYNCB SCL Serial clock line This pin is used in conjunction with the SDA line to clock data into or out of the 24 bit input register This signal is named SYNCB_SCL in Figure 7 If an external microcontroller is used a 2 2 kΩ pull up resistor...

Page 8: ...O_SDA WHT WHT 0 SCL_0 AD5696RBRUZ GAIN VOUTA 8 13 9 14 12 U4 VDD VIO SCLK_A0 SDIN_A1 RSTSEL VREF VOUTC VOUTB VOUTD SDO_SDA SYNCB_SCL AGND VOUTB VREF RSTSEL RESET A1 SCL A0 VLOGIC GAIN LDAC SDA VOUTD VOUTC VDD GND VOUTA 2 1 P1 VDD VIO TSW 102 08 G S 5 6 EXT_SUP LABEL LINKS 1 2 3 3V 3 4 USB_SUP 4 5 1 2 3 U2 C17 C19 6 5 4 3 2 1 PWRSEL C18 2 1 EXTSUP N P C20 10UF 0 1UF TSW 103 08 G D VDD OSTTC022162 U...

Page 9: ...R TO SET SDP RESULT TO A NON FUNCTIONAL SYSTEM 114 69 52 SDP CONNECTOR R20 SCLK 100 R13 118 119 FX8 120S SV 21 C22 1 8 2 E1 107 108 109 10UF 600OHM SDA_0 R0603 DNI 100K R0603 SDIN R0603 TOL 1 100K DNI SDO SCL_0 RSTSEL LDACB A1 A0 RESETB GAIN TOL 1 100K TOL 1 R0603 100K VIO 0 VIO USB_SUPPLY EEPROM 24LC32A I ST 10UF TSSOP8 0 1UF SYNCB VIO 0 1UF 4 7UF SDP 61 71 56 3 4 6 11 17 23 28 36 40 46 58 63 75 ...

Page 10: ...UG 726 EVAL AD5696RSDZ User Guide Rev C Page 10 of 13 12475 008 Figure 9 EVAL AD5696RSDZ Component Placement 12475 009 Figure 10 EVAL AD5696RSDZ Top Side Routing ...

Page 11: ...EVAL AD5696RSDZ User Guide UG 726 Rev C Page 11 of 13 12475 010 Figure 11 EVAL AD5696RSDZ Bottom Side Routing ...

Page 12: ...ic 1 C21 Capacitor 10 µF 25 V X5R Generic 1 C22 Capacitor 4 7 µF 25 V X5R Generic 1 C23 Capacitor 0 1 µF 25 V X8R Generic 1 E1 Ferrite bead 600 Ω Generic 1 E2 Ferrite bead 330 Ω Generic 2 EXTREF EXTSUP 2 pin terminal block Generic 1 P1 2 pin link jumper Generic 2 REF PWRSEL 6 pin link jumper Generic 1 R12 Resistor 1 8 Ω 5 1 10 W thick film chip Generic 1 R13 Resistor 0 Ω SMD Generic 4 R5 R9 R15 R1...

Page 13: ...fer any portion of the Evaluation Board to any other party for any reason Upon discontinuation of use of the Evaluation Board or termination of this Agreement Customer agrees to promptly return the Evaluation Board to ADI ADDITIONAL RESTRICTIONS Customer may not disassemble decompile or reverse engineer chips on the Evaluation Board Customer shall inform ADI of any occurred damages or any modifica...

Reviews: