3-7
CPU Configuration
Execute Disable Bit Capability
Intel's Execute Disable Bit functionality can prevent certain classes of malicious
"buffer overflow" attacks when combined with a supporting operating system.
This functionality allows the processor to classify areas in memory by where
application code can execute and where it cannot. W hen a malicious worm
attempts to insert code in the buffer, the processor disables code execution,
preventing damage or worm propagation.
Core M ulti-Processing
CMP (Core Multi Processing) is the ability to have many independent processing
cores on a single die, each with their own L1 Code & Data caches, Local APICs
& thermal controls, while having a shared L2 cache, power management & bus
interface. Intel multi-core architecture has a single Intel processor package that
contains two or more processor "execution cores," or computational engines to
enable enhanced performance and more-efficient simultaneous processing of
multiple tasks.
Intel(R) SpeedStep(tm) Tech
EIST (Enhanced Intel SpeedStep Technology) allows the system to dynamically
adjust processor voltage and core frequency, which can result in decreased
average power consumption and decreased average heat production.
Advanced
Manual
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