Enterprise-IV EISA VLB Motherboard User's Guide
1
Chapter 1
Introduction to VL-Bus
The Series 87 Enterprise-IV EISA Local Bus Motherboard conforms to the VESA® (Video Electronics
Standards Association) VL-Bus® specifications as well as the EISA (Extended Industry Standard
Architecture) specification.
The VL-Bus
The VL-Bus is designed to standardize the hardware interface of peripherals connected to a
microprocessor-level local bus. The VL-Bus Specification is a standard set of interface, architecture,
timings, electrical, and physical specifications that permits all VL-Bus products to be totally
interchangeable.
VL-Bus is Based on 80486 Local Bus Design
The general architecture of the VL-Bus is designed to Intel® 80486 CPU local bus standards with
additional hardware functions that accommodate VL-Bus master devices and facilitate the system I/O bus
interface. The timing specifications allow VL-Bus devices to operate at the full 32-bit 80486 CPU
bandwidth.
Both VL-Bus slots on the Enterprise-IV motherboard have bus mastering capability.
Six of the
seven EISA expansion slots are EISA (NOT Vl-Bus) bus mastering slots.
EISA and Local Bus Expansion
The American Megatrends Enterprise-IV EISA Local Bus motherboard has seven expansion slots. Six of
these slots are EISA bus mastering slots. One is an EISA non-bus master slot. Two slots are VL-Bus bus
mastering slots. The VL-Bus slots consist of a standard EISA 32-bit slot connector and an inline VL-Bus
connector.
Summary of Contents for 87 Series
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