358
AMD Geode™ SC1200/SC1201 Processor Data Book
Video Processor Module - Video Processor Registers - Function 4
32579B
Offset C2Ch-C2Fh
DAC Control Register
Reset Value: 00000020h
31:7
Reserved.
6
TV_DAC_TEST (TV DAC Glitch Test).
When this bit is asserted, the TV DACs operate in Test mode.
5
PDN (Power Down).
When asserted, the TV DACs are placed in power-down mode.
4:3
VREF (VREF Select).
Selects the source for the voltage reference for the TV DACs.
00 & 01: Select internal bandgap reference.
10 & 11: Select external voltage reference.
2:0
TRIM.
The value in this field is used to adjust the internal voltage reference.
Offset C50h-C53h
VBI Scaler Register
Reset Value: 00000004h
31:17
Reserved.
16
VBI_TEST_MODE (VBI Test Mode).
Precoded data (a square wave) sent as VBI data.
0: Not precoded VBI data.
1: Precoded VBI data.
15:8
VBI_SCALE_GAIN (VBI Scale Gain).
The VBI value for each pixel is multiplied by this value, and the result is divided by
128.
7:0
VBI_SCALE_OFFSET (VBI Scale Offset).
This field contains a signed number between
−
128 and +127. This value is
added to the VBI value of each pixel.
Table 7-9. Memory Offset: Video Processor Configuration Registers (Continued)
Bit
Description
Summary of Contents for Geode SC1200
Page 8: ...8 AMD Geode SC1200 SC1201 Processor Data Book List of Figures 32579B...
Page 16: ...16 AMD Geode SC1200 SC1201 Processor Data Book Overview 32579B...
Page 24: ...24 AMD Geode SC1200 SC1201 Processor Data Book Architecture Overview 32579B...
Page 364: ...364 AMD Geode SC1200 SC1201 Processor Data Book Debugging and Monitoring 32579B...