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Enpirion

®

 Power Evaluation Board User Guide

 

EN63A0QI PowerSoC 

D1

S2A

+

C14

VIN

TP27

J7

J6

J11

1206

1210

1210

1206

C1

FB1

C4

08

05

08

05

08

05

0805

08

05

08

05

C8

C9

R11

VFB

J2

1

2

3

J3

1

2

3

TP6

08

05

0805

J10

VOUT

M/S

ENA

J4

TP9

1
2

C3

TP15

TP14

R2

1206

C2

VIN

PGND

ENA

M/S

POK

VOUT

PGND

C15

08

05

0805

C5

C6

R8

R7

R3

R6

C7

AVIN

0402

0402

TP30

TP31

J1

1

2

3

R13

VFB

R14

VF

B

R4

SEL

TP3

08

05

SEL

TP5

FADJ

XREF

08

05

08

05

R5

TP21

TP22

TP32

08

05

SIN

SOUT

SCH  04696

PCB  04697

Provision for Implementing

Adaptive Voltage Scaling

04

02

1210

C10

C12

C11

C13

TP19

1

2

TP20

1

2

C16

R10

VIN

VOUT

R1

T

P

10

04

02

TP8

TP7

J5

1

3

5

2

4

6

8

7

D2

TP28

BF_IN

08

05

T

P

29

TP17

1

2

TP18

1

2

R9

TP11

U1

EN63A0Q

NC1

1

NC2

2

NC3

3

NC4

4

NC5

5

NC6

6

NC7

7

NC8

8

NC9

9

NC10

10

NC11

11

NC12

12

NC13

13

NC14

14

NC1

9

1

9

VOU

T

2

0

VOU

T

2

1

VOU

T

2

2

VOU

T

2

3

VOU

T

2

4

VOU

T

2

5

VOU

T

2

6

VOU

T

2

7

VOU

T

2

8

NC2

9

2

9

N

C

(SW

)3

0

3

0

N

C

(SW

)3

1

3

1

PGN

D

3

2

PGN

D

3

3

PGN

D

3

4

PGN

D

3

5

PGN

D

3

6

PGN

D

3

7

S_IN

56

PGND

55

VDDB

54

NC53

53

NC52

52

PVIN

51

PVIN

50

PVIN

49

PVIN

48

PVIN

47

PVIN

46

PVIN

45

PVIN

44

PVIN

43

NC7

6

7

6

NC7

5

7

5

NC7

4

7

4

NC7

3

7

3

NC7

2

7

2

N

C

(SW

)7

1

7

1

N

C

(SW

)7

0

7

0

EN

_PB

6

9

F

QAD

J

6

8

EXT

R

EF

6

7

VSEN

SE

6

6

SS

6

5

EAOU

T

6

4

VF

B

6

3

M/

S

6

2

AGN

D

6

1

AVI

N

6

0

EN

ABL

E

5

9

POK

5

8

PGN

D

3

8

S_

OU

T

5

7

PVIN

42

PVIN

41

PVIN

40

PVIN

39

NC15

15

NC16

16

NC17

17

NC18

18

TP12

Short across R9

when all other

routing completed

TP4

TP1

VIN

TP23

TP2

TP16

T

P

24

TP25

TP13

TP26

U2

 

 
 

Figure 5:  Evaluation Board Schematic

 

Page 6 of 8 

www.altera.com/enpirion

 

Summary of Contents for Enpirion EN63A0QI

Page 1: ...includes the bulk of the compensation network internally However an external phase lead zero capacitor and resistor is required as part of the feedback This network is shown in Figure 1 Appropriate co...

Page 2: ...the Enable pin The jumper on Enable pin as shown is in disable mode When jumper is between the middle and right pins the signal pin is connected to ground or logic low When the jumper is between the l...

Page 3: ...minal output voltages from left to right for second through fourth positions are 1 80V 1 20V and 1 02V Jumpers as shown select 1 20V output CAUTION Except ENA no other jumpers can be changed while the...

Page 4: ...et the pulse amplitude to swing from 0 to 2 5 volts Set the pulse period to 10msec duty cycle to 50 and fast transition 1usec Hook up oscilloscope probes to ENA POK and VOUT with clean ground returns...

Page 5: ...Enpirion Power Evaluation Board User Guide EN63A0QI PowerSoC Figure 4 Evaluation Board Layout Assembly Layer Page 5 of 8 www altera com enpirion...

Page 6: ...05 TP29 TP17 1 2 TP18 1 2 R9 TP11 U1 EN63A0Q NC1 1 NC2 2 NC3 3 NC4 4 NC5 5 NC6 6 NC7 7 NC8 8 NC9 9 NC10 10 NC11 11 NC12 12 NC13 13 NC14 14 NC19 19 VOUT 20 VOUT 21 VOUT 22 VOUT 23 VOUT 24 VOUT 25 VOUT...

Page 7: ...ripple and load transient deviations are conveniently measured at TP19 For more accurate ripple measurement please refer to Enpirion App Note regarding this subject 4 The board includes a pull up for...

Page 8: ...SOR 6 5V BIDIRECTIONAL SMT Contact Information Altera Corporation 101 Innovation Drive San Jose CA 95134 Phone 408 544 7000 www altera com 2013 Altera Corporation Confidential All rightsreserved ALTER...

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