Enpirion
®
Power Evaluation Board User Guide
EN63A0QI PowerSoC
•
The board also has soldermask openings for 0805 ceramic capacitors at
the input and output edges. If you are planning to do radiated any EMI
testing on this board, place a 10uF, 0805, X7R or X5R capacitor at each
board edge. The added capacitor at the input edge is for high-frequency
decoupling of the input cables. The added capacitor at the output edge is
meant to represent a typical load decoupling capacitor.
V
OUT
R
A
C
A
R
B
V
FB
R
1
Figure 1: Output voltage programming and loop compensation.
Quick Start Guide
Figure 2: J2 allows control of the Enable pin.
The jumper on Enable pin as shown is in disable mode. When jumper is between
the middle and right pins the signal pin is connected to ground or logic low. When
the jumper is between the left and middle pins, the signal pin is connected to VIN
or logic High.
WARNING
:
complete steps 1 through 4 before applying power to the EN63A0QI
evaluation board.
STEP 1:
Set the “ENA” jumper to the Disable Position.
STEP 2:
Set the output voltage by putting a jumper in the desired positions for
connector header J5 as shown below. In order for this board to work,
VIN
SIDE
GND
SIDE
Ω
=
−
×
=
Ω
×
=
Ω
×
=
−
k
R
V
V
V
R
V
R
R
C
V
R
FB
FB
OUT
A
FB
B
A
A
A
12
10
6
.
4
/
400
,
48
1
6
nominal
0.6V
is
value.
calculated
the
than
lower
value
available
closest
to
down
C
Round
)
F/
in
/R
(C
V)
in
/V
(R
A
A
A
IN
A
IN
Page 2 of 8
www.altera.com/enpirion
