Programming Reference
B–5
Address
Bit
Classification
Description
S:1/0 to
S:1/4
Controller
Mode Status/
C
Status
Bits 0–4 function as follows:
0 0000 = (0) Remote Download in progress
0 000
R
S:1/4
Mode Status/
Control
0 0000 = (0) Remote Download in progress
0 0001 = (1) Remote Program mode
0 0011 = (3) Suspend Idle (operation halted by
c
c
0 0011 = (3) Suspend Idle (operation halted by
SUS instruction execution)
0 0110 = (6) Remote Run mode
0 0
7 R
c
0 0 0
6 R
R
0 0111 = (7) Remote Test continuous mode
0 1000 = (8) Remote Test single scan mode
S:1/5
Forces
Enabled
Status
This bit is set by the controller (1) to indicate
that forces are always enabled.
S:1/6
Forces
Installed
Status
This bit is set by the controller to indicate that
forces have been set by the user.
S:1/7
Comms Active
Status
This bit is set when the controller receives valid
data from the communication port. For DF1
protocols, the bit is reset if the controller does
not receive valid data from the programming
port for 10 seconds.
Note: In DF1 half-duplex mode, simple polls
by the DF1 master or replies to received
messages will not reset the timer. A poll with a
command is required to reset the timer.
For DH-485, the bit is reset as soon as the
DH-485 link layer determines that no other
devices are active on the link.
Application Note: For DF1 half-duplex, you
can use this bit to enable a timer (via an XIO
instruction) to sense whether the DF1 master is
actively communicating to the slave. The
preset of the timer is determined by the total
network timing.
S:1/8
Fault Override
at Powerup
Static
Configuration
When set, this bit causes the controller to clear
the Major Error Halted bit S:1/13 and Minor
error bits S:5/0 to S:5/7 on power up if the
processor had previously been in the REM Run
mode and had faulted. The controller then
attempts to enter the REM Run mode. Set this
bit offline only.
Reference
efesotomasyon.com - Allen Bradley,Rockwell,plc,servo,drive
