V cc
D U T
G N D
Pin
under
test
m A
U ntested
O utput O pen
C ircuit
U ntested
Input T ied
to V supply
T rigger
Source
V Supply
+
+
Icc M easurem ent
1 Source
Test Circuit: Negative Input/Output Overvoltage/Overcurrent
Vcc
DUT
GND
mA
Untested
Output Open
Circuit
All Input Tied
to V supply
V Supply
+
Icc Measurement
Supply voltage Test
Figure 6.2 Latch-Up Test Circuits
Model
Model
Voltage (v)/ Current (mA)
S/S
Results
+
Voltage
-
11.0
11.0
5 TBD
+
Current
-
200
200
5 TBD
Vdd-Vxx 9.0
5
TBD
Table 6.5 Latch–Up Data
AU9228 USB KVM Controller V1.01W
15
Summary of Contents for AU9228
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