6
6
.
.
6
6
L
L
a
a
t
t
c
c
h
h
-
-
U
U
p
p
T
T
e
e
s
s
t
t
R
R
e
e
s
s
u
u
l
l
t
t
s
s
Test Description:
Latch-Up testing was performed at room ambient using an
IMCS-4600 system which applies a stepped voltage to one pin per device with all
other pins open except Vdd and Vss which were biased to 5 Volts and ground
respectively.
Testing was started at 5.0 V (Positive) or 0 V(Negative), and the DUT was biased for
0.5 seconds.
If neither the PUT current supply nor the device current supply reached the predefined
limit (DUT=0 mA , Icc=100 mA), then the voltage was increased by 0.1 Volts and the
pin was tested again.
This procedure was recommended by the JEDEC JC-40.2 CMOS Logic
standardization committee.
Notes:
1. DUT: Device Under Test.
2. PUT: Pin Under Test.
Icc Measurement
Pin
under
test
+
Vcc
DUT
GND
m
Untested
Output Open
Circuit
Untested
Input Tied
to V supply
Trigger
Source
V Supply
Pin
under
test
1 Source
+
Test Circuit : Positive Input/ output Overvoltage /Overcurrent
AU9228 USB KVM Controller V1.01W
14
Summary of Contents for AU9228
Page 1: ...AU9228 USB KVM Controller Technical Reference Manual ...
Page 2: ...AU9228 USB KVM Controller ...
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