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Model No.: 14LAANZACDC
Version: 1.0
SIGNAL PROCESS
1. HIGH /INTERMEDIATE FREQUENCY SIGNAL PROCESSOR
Through the high /intermediate frequency signal processor, the RF TV signal received by the
antenna is high-frequency amplified and converted to develop and output an IF signal, then are IF
amplified and demodulated to develop a video signal and SIF signal as well as AFT control signal
and AGC control signal. The high /intermediate frequency signal processor mainly consists of a
A101 tuner, IF filtering circuit formed of V102 and Z101 and IF signal processor in LA76818A.
If signals output from the A101 tuner are coupled by C110 to V102 IF pre-amplifier for IF
amplifying by about 20dB to compensate insertion loss of Z101 SAW filter. After coupled by
C112, the IF signals output from V102 are sent to the Z101 SAW filter to develop IF signals,
which meet requirements for the IF and amplitude frequency characteristics, to N101’s Pin5 and
Pin6. In N101, the generated IF signal are filtered out a video signal as a second SIF signal after
through multi-polarity IF amplifying and PLL sync detecting, which then are output in two ways.
After one set of signal is trapped (to eliminate the second SIF signal), cored and pre-video
amplified, Pin 46 outputs video signals, which are sent to the video circuit for processing from
N101’s Pin44 after divided by R201 and R202 and coupled by C204, another set is output from
N101’s Pin52, which is later sent to the SIF circuit from N101’s Pin54 after coupled by C126.
The band control voltages of the A101 tuner are controlled respectively by levels output from
Pin1 and Pin2 of N701 output low level to supply band switchover voltage to related pin of the
tuner after out-phased by the related triode.
N701’s Pin32 supplies VT voltage to the A101 tuner. The width pulse output from N701’s Pin32
is converted into DC tuning voltage to be supplied to VT terminal of the tuner after
level-converted and out-phased by V701 and integrating filtered by C707, R710, R712, R714,
R715, R716, C709, C711, R718, N705 and C 708 are formed into a 33V stabilizing circuit.
The RF AGC voltage from LA76818’s Pin4 is sent to AGC control terminal of the tuner through
R104, R103 and R119 are voltage-dividing bias resistors of RF AGC and C104 is a filtering
capacitor.
