Pin Descriptions
Pinout Information
2.2.1
Video Port Pins
Table 2-1
provides detailed pin descriptions for the Video Port.
Table 2-1 Video Port Pin Descriptions
Name
Pin(s)
Type
Function
PVHS
28
I
Primary Video (PV) Port horizontal sync input. Indicates start of next line of input data.
This signal is internally polarity corrected (PVHS_POL) so PVHS can be either active-
high or active-low. [Input, pull-down, 5V-tolerant]
PVVS
27
I
Primary Video (PV) Port vertical sync input. Indicates start of next field or frame of
input data. This signal is internally polarity corrected (PVVS_POL) so PVVS can be
either active-high or active-low. [Input, pull-down, 5V-tolerant]
CREF
26
I
Video input clock reference. [Input, pull-down, 5V-tolerant]
• cref_mode = 1
• cref_mode = 0
PVCLK
25
I
Primary Video (PV) Port pixel clock input. [Input, pull-down, 5V-tolerant]
SVVS
12
I
Secondary Video (SV) Port (ITU-R BT656 format) vertical sync input. Indicates start of
next field or frame of input data. This signal is internally polarity corrected (svvs_pol)
so SVVS can be either active-high or active-low. [Input, pull-down, 5V-tolerant]
SVHS
11
I
Secondary Video (SV) Port (ITU-R BT656 format) horizontal sync input. This signal is
internally polarity corrected (
svhs_pol
) so SVHS can be either active-high or active-
low. [Input, pull-down, 5V-tolerant]
SVCLK
13
I
Secondary Video (SV) Port (ITU-R BT656 format) pixel clock input. [Input, pull-down,
5V-tolerant]
PVCLK
sampling points
0
1
N-1
N
CREF
VR, VG, VB
PVCLK
sampling points
0
1
N-1
N
CRE F
VR, VG, VB
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Page 111: ...Exploded View Diagram Exploded View Diagram ...