Aiwa XD-DV520, Service Manual

Page: 42 / 51

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IC DESCRIPTION -4/4 (STI5519) -2/6
30 VDD_YCC VDDA_YCC=2.5V POWER
31 VSS_YCC VSSA_YCC=GND POWER
32 Y_OUT Y_OUT O
33 C_OUT C_OUT O
34 CV_OUT CV_OUT O
35 V_REF_YCC V_REF_DAC_YCC I
36 I_REF_YCC I_REF_DAC_YCC I
37 VDD2_5 2.5V POWER SUPPLY POWER
38 VSS GROUND POWER
39 PIO4[0] PIO4[0] YC[0] I/O
40 PIO4[1] PIO4[1] YC[1] I/O
41 PIO4[2] PIO4[2] YC[2] I/O
42 PIO4[3] PIO4[3] YC[3] I/O
43 PIO4[4] PIO4[4] YC[4] I/O
44 PIO4[5] PIO4[5] YC[5] I/O
45 PIO4[6] PIO4[6] YC[6] I/O
46 PIO4[7] PIO4[7] YC[7] I/O
47 VDD3_3 3.3 V POWER SUPPLY POWER
48 VDD_PCM VDD FREQ SYNTH=2.5V POWER
49 VSS_PCM VSS FREQ SYNTH=GND POWER
50 VSS GROUND POWER
51 DAC_SCLK SAMPLING CLK EXT_AUD_CLK O
52 DAC_PCMOUT0 PCM_OUT0 EXT_AUD_DATA O
Bottom side
53 DAC_PCMOUT1 PCM_OUT1 EXT_AUD_REQ I/O
54 DAC_PCMOUT2 PCM_OUT2 O
55 DAC_PCMCLK PCM_CLOCK I/O
56 DAC_LRCLK LEFT/RIGHT CLK EXT_AUD_WCLK O
57 SPDIF_OUT SPDIF_OUT O
58 SMI_ADR[4] Adress bus SDRAM O
59 SMI_ADR[5] Adress bus SDRAM O
60 SMI_ADR[6] Adress bus SDRAM O
61 SMI_ADR[7] Adress bus SDRAM O
62 SMI_ADR[8] Adress bus SDRAM O
63 SMI_ADR[9] Adress bus SDRAM O
64 VDD2_5 2.5V POWER SUPPLY POWER
65 VSS GROUND POWER
66 SMI_ADR[3] Adress bus SDRAM O
67 SMI_ADR[2] Adress bus SDRAM O
68 SMI_ADR[1] Adress bus SDRAM O
Pin No. Pin name Main function
Alternate function
Dir func.
Input Output
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