Aiwa RM-Z401P, Service Manual

Page: 27 / 35

5-3
Pin No.
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
Pin Name
RD8
DVSS
CLK
CLE
RA11
RA9
RA8
DMVDD3
DMVSS
RA7
DVDD3
RA6
RA5
RA4
DVSS
DQM1
DQM0
BA1
RA10
DVDD2
RA0
RA1
RA2
RA3
DVSS
RD31
RD30
RD29
RD28
DVDD3
RD27
RD26
RD25
RD24
DVSS
DQM3
DQM2
RD23
RD22
DVDD2
RD21
RD20
RD19
RD18
DVSS
RD17
RD16
ABCK
ALRCK
DVDD3
I/O
I
–
O
O
O
O
O
–
–
O
–
O
O
O
–
O
O
O
O
–
O
O
O
O
–
I
I
I
I
–
I
I
I
I
–
O
O
I
I
–
I
I
I
I
–
I
I
O
I
–
Function
DRAM data 8
Ground pin for internal digital circuitry
DRAM clock
DRAM clock enable
DRAM address 11
DRAM address 9
DRAM address 8
3.3V power pin for DRAM clock circuitry
Ground pin for DRAM clock circuitary
DRAM address 7
3.3V power pin for internal digital circuitry
DRAM address 6
DRAM address 5
DRAM address 4
Ground pin for internal digital circuitry
Mask for DRAM input/output byte 1
Mask for DRAM input/output byte 0
DRAM bank address 0
DRAM address 10
2.5V power pin for internal digital circuitry
DRAM address 0
DRAM address 1
DRAM address 2
DRAM address 3
Ground pin for internal digital circuitry
DRAM data 31
DRAM data 30
DRAM data 29
DRAM data 28
3.3V power pin for internal digital circuitry
DRAM data 27
DRAM data 26
DRAM data 25
DRAM data 24
Ground pin for internal digital circuitry
Mask for DRAM input/output byte 3
Mask for DRAM input/output byte 2
DRAM data 23
DRAM data 22
2.5V power pin for internal digital circuitry
DRAM data 21
DRAM data 20
DRAM data 19
DRAM data 18
Ground pin for internal digital circuitry
DRAM data 17
DRAM data 16
Audio bit clock
Audio left/right channel clock
3.3V power pin for internal digital circuitry