–
18
–
Pin No.
Pin Name
I/O
Description
50
MON1
I
Monitor 1 signal input from LC89642.
51
MON0
I
Monitor 0 signal input from LC89642.
52
DEFECT
I
DEFECT signal input.
53
PPIT
I
PPIT signal input.
54
READ
O
Output H when reading data.
55
PLG-1
I
Insertion detection signal input of head phone jack (L: Inserted).
56
RESET
O
LC89642 reset signal output.
57
HOLDER
I
Holder OPEN(H)/CLOSE (L) signal input & standby release.
58
DRAMSW
O
Power supply control output of DRAM L: (Turn on the power supply of DRAM).
59
PCK
I
PCK signal input of LC89642.
60
FSEQ
I
FSEQ signal input of LC89642.
61~63
NC
O
Not used (L Output).
64
STALL
O
Power supply control output of BD6606 (H: ON).
65
SHOCK
I
SHOCK input of LC89642
66,67
NC
O
Not used (L Output).
68
VSS3
–
Connect to GND.
69
VDD3
–
Connect to VDD.
70
MCAS
O
CAS signal output to DRAM.
71
MRAS
O
RAS signal output to DRAM.
72
BUP
O
Micom control of DRAM/DSP control switch signal output (H: Micom control).
73
P-CON
O
System power supply control (L: Turn on the power supply).
74
AMUTE
O
AUDIO MUTE signal output (H: Turn ON MUTE).
75
RMCDT
O
Serial data output to liquid crystal remote controller.
76
PWSTB
O
Standby signal output of headphone driver (L: standby).
77
HOLD
I
HOLD signal input (L: HOLD ON)
78
SEDIR
I
Direction input of sledding move (H: inside
→
outside, L: outside
→
inside).
79
JAPAN
I
Domestic / Overseas version switch input (H: Domestic).
80
TEST
I
Test mode / Main mode switch input (L: Test mode).
Summary of Contents for AM-CL33
Page 14: ... 14 SCHEMATIC DIAGRAM 1 MAIN ...
Page 16: ... 16 IC BLOCK DIAGRAM ...