AEG DUA2.1, Technical Manual And User Manual

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Time delay settings
Each voltage element is associated to an independent time
delay.
Each measuring element time delay can be blocked by the
operation of a user defined logic (optical isolated) input (see
“Blocking logic1” or “Blocking logic2” functions).
Element Time delay type
1st stage Definite Time (DT) or IDMT
2nd stage DT
Inverse Time Delay Characteristic
The inverse characteristic is defined by the following formula :
⎟
⎟
⎟
⎟
⎟
⎠
⎞
⎜
⎜
⎜
⎜
⎜
⎝
⎛
−
=
1
V
V
TMS
t
S
1
where :
t = operating time in seconds
TMS = time Multiplier Setting
V1 = applied input voltage
Vs = relay setting voltage
TMS 0,5… 100.0 (by step: 0.5)
tRESET (only DT) 0.00… 100.00s
Definite time delay characteristics
tV1< 0.00… 599.00s
tV1<< 0.00… 599.00s
Hysteresis
Hysteresis fixed 105%