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SOM-C350 User Manual

92

D.1

System I/O Ports

Table D.1: System I/O ports

Addr.Range(Hex)

Device

0x00000299-0x0000029A

Motherboard resources

0x000002C0-0x000002DF

Motherboard resources

0x000002A0-0x000002BF

Motherboard resources

0x000002A0-0x000002BF

Motherboard resources

0x00000290-0x0000029F

Motherboard resources

0x0000029E-0x000002AD

Motherboard resources

0x00000060-0x0000006F

Motherboard resources

0x00000200-0x0000027F

Motherboard resources

0x00000300-0x0000037F

Motherboard resources

0x00000280-0x0000028F

Motherboard resources

0x00000280-0x0000028F

Motherboard resources

0x000002F0-0x000002F7

Motherboard resources

0x0000002E-0x0000002F

Motherboard resources

0x0000004E-0x0000004F

Motherboard resources

0x00000061-0x00000061

Motherboard resources

0x00000063-0x00000063

Motherboard resources

0x00000065-0x00000065

Motherboard resources

0x00000067-0x00000067

Motherboard resources

0x00000070-0x00000070

Motherboard resources

0x00000080-0x00000080

Motherboard resources

0x00000092-0x00000092

Motherboard resources

0x000000B2-0x000000B3

Motherboard resources

0x00000680-0x0000069F

Motherboard resources

0x0000164E-0x0000164F

Motherboard resources

0x00000062-0x00000062

Microsoft ACPI-Compliant Embedded Controller

0x00000066-0x00000066

Microsoft ACPI-Compliant Embedded Controller

0x000003F8-0x000003FF

Communications Port (COM1)

0x000002F8-0x000002FF

Communications Port (COM2)

0x00001854-0x00001857

Motherboard resources

0x00003090-0x00003097

Standard SATA AHCI Controller

0x00003080-0x00003083

Standard SATA AHCI Controller

0x00003060-0x0000307F

Standard SATA AHCI Controller

0x00000000-0x00000CF7

PCI Express Root Complex

0x00000D00-0x0000FFFF

PCI Express Root Complex

0x00000020-0x00000021

Programmable interrupt controller

0x00000024-0x00000025

Programmable interrupt controller

0x00000028-0x00000029

Programmable interrupt controller

0x0000002C-0x0000002D

Programmable interrupt controller

0x00000030-0x00000031

Programmable interrupt controller

0x00000034-0x00000035

Programmable interrupt controller

0x00000038-0x00000039

Programmable interrupt controller

0x0000003C-0x0000003D

Programmable interrupt controller

0x000000A0-0x000000A1

Programmable interrupt controller

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Summary of Contents for SOM-C350

Page 1: ...User Manual SOM C350 12th Gen Intel Core Processors Alder Lake S COM HPC Client Size C Module...

Page 2: ...antech assumes no liability under the terms of this warranty as a consequence of such events Because of Advantech s high quality control standards and rigorous testing most of our customers never need...

Page 3: ...f and on the user is encouraged to try to correct the interference by one or more of the following measures Reorient or relocate the receiving antenna Increase the separation between the equipment and...

Page 4: ...contact your dealer immediately SOM C350 CPU module 1 x heatspreader 1970005474T001 Warning Warnings indicate conditions which if not observed can cause personal injury Caution Cautions are included t...

Page 5: ...6GHz 32 EU 0 60 C SOM C350C5R U9A1 i5 12500E 6C 6 0 65W 12 2 9GHz 4 5GHz NA 32 EU 0 60 C SOM C350C3R H2A1 i3 12100E 4C 4 0 60W 8 3 2GHz 4 2GHz NA 24 EU 0 60 C SOM C350PTR H6A1 G7400E 2C 2 0 46W 4 3 6...

Page 6: ...ur any liquid into an opening This may cause fire or electrical shock 13 Never open the equipment For safety reasons the equipment should be opened only by qualified service personnel 14 If one of the...

Page 7: ...splayPort HDMI DVI and SDVO EAPI Embedded Application Programmable Interface Software interface for COM Express specific industrial function System information Watchdog timer I2C Bus Flat Panel bright...

Page 8: ...SOM C350 User Manual viii...

Page 9: ...ps ID Rear 12 2 2 Mechanical Diagrams 13 Figure 2 3 Board Mechanical Diagram Front 13 Figure 2 4 Board Mechanical Diagram Rear 13 Figure 2 5 Board Mechanical Diagram Side 14 2 3 Assembly Diagrams 14 F...

Page 10: ...2 Figure 3 29NVME Configuration 43 3 2 3 Chipset Setup 43 Figure 3 30Chipset Setup 43 Figure 3 31System Agent SA Configuration 44 Figure 3 32Memory Configuration 45 Figure 3 33Graphics Configuration 4...

Page 11: ...tchdog Timer 88 Appendix C Programming GPIO 89 C 1 GPIO Register 90 Appendix D System Assignments 91 D 1 System I O Ports 92 Table D 1 System I O ports 92 D 2 Interrupt Assignments 93 Table D 2 Interr...

Page 12: ...SOM C350 User Manual xii...

Page 13: ...Chapter 1 1 General Information This chapter details background information on the SOM C350 CPU Computer on Module Sections include Introduction Functional Block Diagram Product Specification...

Page 14: ...terfaces including PCIe Gen 5 16GT s and 2 5Gbase T and USB 3 2 Gen2 10Gbps It enables the use of 3 x independent 8K displays via DisplayPort 1 4 HDMI 2 1 1 x eDP and 3 x DDI interfaces It can be conf...

Page 15: ...Ie x4 Gen4 2 DDI Ports 1x USB3 2 Gen2x1 8x USB 2 0 2x SATA III 2x Soundwire 1x HDA 9 lanes PCIe Gen3 1x PCIe Gen3 PCIe_BMC option 2 5G LAN 1 PCIe Gen3 eSPI GP_SPI 2x I2C SMBus option 2x COM 12x GPIO I...

Page 16: ...32 0 26 Serial J1 SMBus 1 0 1 J1 I2C Bus 2 0 2 J1 IPMB 1 0 0 J1 UART 2 0 2 I O J1 J2 NBASE T max 10G 2 0 2 J2 ETH KR max 25G 2 0 0 J2 ETH KR CEI 1 0 0 J1 USB 2 0 8 0 8 J1 J2 USB 3 2 Gen 2x2 Optional B...

Page 17: ...PU PCI Express x4 Supports default 1 ports PCIe x4 compliant to PCIe Gen4 16 0 GT s specifications configurable only to PCIe x4 PCIe Gen4 x1 PCH PCI Express x1 Supports default 12 ports PCIe x1 compli...

Page 18: ...ode does not support IDE mode USB 3 2 USB 2 0 COM HPC supports USB 3 2 but SOM C350 supports 8 USB 3 2 Gen2 10 Gbps ports and 8 USB 2 0 480 Mbps ports For USB 3 2 the product supports LPM U0 U1 U2 and...

Page 19: ...te up to 115 2K TPM Support TPM 2 0 module by option Smart Fan Supports 1 Fan PWM control signals and 1 tachometer input for fan speed detection Provides 1 on module with connector and the other to th...

Page 20: ...will boot up a few times 5 The BIOS will load default setting successfully 1 3 9 Power Management Power Supply Supports both ATX and AT power modes VSB is for suspended power and can be optional if no...

Page 21: ...Operating 0 60 C 32 140 F Storage 40 85 C 40 185 F Humidity Operating 40 C 95 relative humidity non condensing Storage 60 C 95 relative humidity non condensing Vibrations IEC60068 2 64 Random vibratio...

Page 22: ...ing any program 1 3 16 Performance To compare performance or benchmark data with other modules please refer to the Advantech COM Performance Power Consumption Table 1 3 17 Pin Description Advantech pr...

Page 23: ...Chapter 2 2 Mechanical Information This chapter details mechanical information on the SOM C350 CPU Computer on Module Sections include Board Information Mechanical Diagram Assembly Diagram...

Page 24: ...signing your own carrier board to avoid mechanical issues and ensure thermal solution contact points for best thermal dissi pation performance Figure 2 1 Board Chips ID Front Figure 2 2 Board Chips ID...

Page 25: ...ls about 2D 3D models please find on Advantech COM support ser vice website http com advantech com Figure 2 3 Board Mechanical Diagram Front Figure 2 4 Board Mechanical Diagram Rear 0 4 116 120 0 20 1...

Page 26: ...Side 2 3 Assembly Diagrams These figures demonstrate the assembly order from the thermal module to the COM module to the carrier board Figure 2 6 Assembly Diagram There are 6 reserved screw holes for...

Page 27: ...ble module and carrier board and follow the allowable angel of the board to board connector as demonstrated in the following figures to avoid damaging the board to board connector Mating Angle Require...

Page 28: ...2 5 CPU Package Design Please consider the CPU and chip height tolerance when designing your thermal solution Figure 2 9 CPU and CPU Socket Height and Tolerance Item LGA 1700 IHS to MB Height validat...

Page 29: ...Chapter 3 3 BIOS Operation This chapter details BIOS setup information for the SOM C350 CPU Computer on Module Sections include Introduction Entering Setup Hot Operation Key Exit BIOS Setup Utility...

Page 30: ...This chapter describes the basic navigation of the BIOS Setup Utility Figure 3 1 Setup Program Initial Screen AMI s BIOS ROM has a built in Setup program that allows users to modify the basic system...

Page 31: ...ays all the options that can be configured Grayed out options cannot be configured options in blue can The right frame displays the key legend Above the key legend is an area reserved for a text messa...

Page 32: ...ction The Advanced BIOS Setup screens are shown below The sub menus are described on the following pages Figure 3 3 Advanced BIOS features setup screen RC ACPI Settings System ACPI Parameters CPU Conf...

Page 33: ...k Configuration Network Stack Settings NVMe Configuration NVMe controller and driver information 3 2 2 1 RC ACPI Settings Figure 3 4 RC ACPI Settings Low Power S0 Idle Capability This variable determi...

Page 34: ...tive Performance cores Figure 3 5 Active Performance cores Active Performance cores Number of P cores to enable in processor package Note Number of Cores and E cores are locked at together When both a...

Page 35: ...ckage Note Number of Cores and E cores are locked at together When both are 0 0 Pcode will Hyper Threading Enable or Disable Hyper Threading Technology AES Enable Disable AES Advanced Encryption Stand...

Page 36: ...l 24 3 2 2 4 Power Performance Figure 3 7 Power Performance CPU Power Management Control CPU Power Management Control Options GT Power Management Control GT Power Management Control Options CPU Power...

Page 37: ...hapter 3 BIOS Operation Figure 3 8 Power Performance Boot performance mode Figure 3 9 Power Performance Boot performance mode Select the performance state that the BIOS will set starting from reset ve...

Page 38: ...le Disable processor Turbo Mode requires EMTTM enabled too AUTO means enabled C states Enable Disable CPU Power Management Allows CPU to go to C states when it s not 100 utilized GT Power Management C...

Page 39: ...Figure 3 10 Embedded Controller Configuration AMT Configuration Configure Intel R Active Management Technology Parameters ME Unconfig on RTC Clear When Disabled ME will nor unconfigured on RTC clear F...

Page 40: ...SOM C350 User Manual 28 AMT configuration Figure 3 11 AMT Configuration 3 2 2 6 Trusted Computing Figure 3 12 Trusted Computing SHA256 PCR Bank...

Page 41: ...archy Physical Presence Spec Version Select to Tell O S to support PPI Spec Version 1 2 or 1 3 Note some HCK tests might not support 1 3 Device Select TPM 1 2 will restrict support to TPM 1 2 devices...

Page 42: ...SOM C350 User Manual 30 Physical Presence Spec Version Figure 3 14 Physical Presence Spec Version Device Select Figure 3 15 Device Select...

Page 43: ...s or Disables BIOS ACPI Auto Configuration Enable Hibernation Enables or Disables System ability to Hibernate OS S4 Sleep State This option may be not effective with some OS ACPI Sleep State Select th...

Page 44: ...ble Polarity Switch Backlight Enable Polarity for Native or Invert Backlight Mode Selection Switch Backlight Control to PWM or DC mode Brightness PWM Polarity Backlight Control Brightness PWM Polarity...

Page 45: ...2C0 Control Enable Disable I2C0 controller on RDC IS200 SMBus0 Control Enable Disable SMBus0 controller on RDC IS200 Serial Port 1 Configuration Figure 3 18 Serial Port 1 Configuration Serial Port Ena...

Page 46: ...User Manual 34 Serial Port 2 Configuration Figure 3 19 Serial Port 2 Configuration Serial Port Enable or Disable Serial Port COM Change Settings Select an optimal settings for Super IO Device Hardware...

Page 47: ...35 SOM C350 User Manual Chapter 3 BIOS Operation Figure 3 20 Hardware Monitor ACPI Report Method Configuration Figure 3 21 ACPI Report Method Configuration ACPI Report Method for CAN Bus...

Page 48: ...d motherboard resource Otherwise Reported vendor _HID Driver installation is necessary ACPI Report Method for GPIO Select the ACPI reporting method for EC GPIO PNP0C02 Reported as reserved motherboard...

Page 49: ...will exchange data Both computers should have the same or compatible settings COM1 Console Redirection settings Figure 3 23 COM1 Console Redirection Settings Terminal Type Emulation ANSI Extended ASCI...

Page 50: ...the receiving buffers are full a stop signal can be sent to stop the data flow Once the buffers are empty a start signal can be sent to re start the flow Hardware flow control uses two wires to send...

Page 51: ...management of a Windows Server OS through a serial port Terminal Type VT UTF8 is the preferred terminal type for out of band management The next best choice is VT100 and then VT100 See above in Consol...

Page 52: ...d Mark parity bit is always 1 Space Par ity bit is always 0 Mark and Space Parity do not allow for error detection They can be used as an additional data bit Stop Bits EMS Stop bits indicate the end o...

Page 53: ...er Support Enable Disable USB Mass Storage Driver Support USB transfer time out The time out value for Control Bulk and Interrupt transfers Device reset time out USB mass storage device Start Unit com...

Page 54: ...If disabled IPv4 HTTP boot support will not be available IPv6 PXE Support Enable Disable IPv6 PXE boot support If disabled IPv6 PXE boot support will not be available IPv6 HTTP Support Enable Disable...

Page 55: ...43 SOM C350 User Manual Chapter 3 BIOS Operation 3 2 2 13 NVME Configuration Figure 3 29 NVME Configuration 3 2 3 Chipset Setup Figure 3 30 Chipset Setup System Agent SA Configuration...

Page 56: ...iguration Memory Configuration Memory Configuration Parameters Graphic Configuration VMD setup menu VMD Configuration PCI Express Configuration PCI Express Configuration Settings VT d VT d capability...

Page 57: ...ation ECC Support Enable disable DDR ECC Support Max TOLUD Maximum value of TOLUD Dynamic assignment would adjust TOLUD auto matically based on the largest MMIO length of installed graphic controller...

Page 58: ...device should be Primary Display Or select HG for Hybrid Gfx Internal Graphics Keep IGFX enabled base on the setup options GTT Size Select the GTT size Aperture Size Select the aperture size Note Abo...

Page 59: ...roller Enable VMD Global Mapping Enable Disable to VMD Global Mapping Map this Root Port under VMD RAID0 Enable Disable RAID0 feature RAID1 Enable Disable RAID1 feature RAID5 Enable Disable RAID5 feat...

Page 60: ...0 User Manual 48 PCI Express Configuration Figure 3 35 PCI Express Configuration PEG PCIe Port Config Config PEG PCIe Lane 0 15 setting PCI Express Root Port 1 PCI Express Root Port 2 PCI Express Root...

Page 61: ...1 PCI Express Root Port 1 Control the PCI Express Root Port Connection Type Built In a built in device is connected to this rootport SlotImplemented bit will be clear Slot this rootport connects to us...

Page 62: ...Audio Configuration HD audio subsystem configuration settings SerialIo Configuration SerialIo configuration settings State After G3 Specify what state to go to when power is re applied after a power f...

Page 63: ...Express Configuration Figure 3 38 PCI Express Configuration Intel Ethernet Controller I225 Foxville LAN0 PCI Express Root Port Settings Flex I O Lane 10 CN2 Intel Ethernet Controller I225 Foxville LAN...

Page 64: ...t Settings Flex I O Lane 18 PCIEX4_5 PCI Express Root Port 10 PCI Express Root Port 11 PCI Express Root Port 12 PCIe Controller 4 PCIe Controller 4 Port 13 16 PCI Express Root Port 13 PCI Express Root...

Page 65: ...LAN0 Control the PCI express root port Connection Type Built In a built in device is connected to this rootport SlotImplemented bit will be clear Slot this rootport connects to user accessible slot Sl...

Page 66: ...root port Connection Type Built In a built in device is connected to this rootport SlotImplemented bit will be clear Slot this rootport connects to user accessible slot SlotImple mented bit will be se...

Page 67: ...es how SATA controller s operate SATA Test Mode Test Mode Enable Disable Loop Back Aggressive LPM Support Enable PCH to aggressively enter link power state SATA Controller Speed Indicates the maximum...

Page 68: ...Override Selectively Enable Disable the corresponding USB port from reporting a Device Connection to the controller USB SS Physical Connector 0 Enable Disable this USB Physical Connector physical port...

Page 69: ...y Configuration Figure 3 43 Security Configuration RTC Memory Lock Enable will lock bytes 38h 3Fh in the lower upper 126 byte bank of RTC RAM BIOS Lock Enable Disable the PCH BIOS lock enable feature...

Page 70: ...io Subsystem Configuration Settings Figure 3 44 HD Audio Subsystem Configuration Settings HD Audio Control Detection of the HD Audio device Disabled HDA will be uncondi tionally disabled Enabled HDA w...

Page 71: ...59 SOM C350 User Manual Chapter 3 BIOS Operation SerialIo Configuration Figure 3 45 SerialIo Configuration 3 2 4 Security Chipset Figure 3 46 Security Chipset...

Page 72: ...igure 3 47 Secure Boot Secure Boot Secure Boot feature is Active if Secure Boot is Enabled Platform Key PK is enrolled and the System is in User mode The mode change requires platform reset Secure Boo...

Page 73: ...conds to wait for setup activation key 65535 0xFFFF means indefinite waiting Bootup NumLock State Select the keyboard NumLock state Quiet Boot Enables or disables Quiet Boot option Boot Option 1 Sets...

Page 74: ...he changes Discard Changes and Reset Reset system setup without saving any changes Save Changes Save Changes done so far to any of the setup options Discard Changes 005B Discard Changes done so far to...

Page 75: ...63 SOM C350 User Manual Chapter 3 BIOS Operation 3 2 6 MEBx Login Intel ME Password MEBx Login...

Page 76: ...SOM C350 User Manual 64...

Page 77: ...Chapter 4 4 S W Introduction Installation Sections include S W Introduction Driver Installation Advantech iManager...

Page 78: ...l and follow Driver Setup instructions to complete the installation 4 2 2 Other OS Linux Ubuntu 4 3 Advantech iManager Advantech s platforms come equipped with iManager a micro controller that provide...

Page 79: ...67 SOM C350 User Manual Chapter 4 S W Introduction Installation...

Page 80: ...SOM C350 User Manual 68...

Page 81: ...Appendix A A Pin Assignment This appendix details information about the hardware pin assign ment of the SOM C350 CPU Sys tem on Module Sections include SOM C350 Client Size Pin Assignment...

Page 82: ...7 VCC J1 A8 VCC J1 B8 SUS_S3 J1 A9 VCC J1 B9 VCC J1 A10 GND J1 B10 WD_STROBE J1 A11 BATLOW J1 B11 WD_OUT J1 A12 PLTRST J1 B12 GND J1 A13 GND J1 B13 USB5 J1 A14 USB7 J1 B14 USB5 J1 A15 USB7 J1 B15 GND...

Page 83: ...B45 LID J1 A46 GND J1 B46 SLEEP J1 A47 eDP_TX3 DSI_TX3 J1 B47 VCC_BOOT_SPI J1 A48 eDP_TX3 DSI_TX3 J1 B48 BOOT_SPI_CS J1 A49 GND J1 B49 BSEL0 J1 A50 eSPI_IO0 J1 B50 BSEL1 J1 A51 eSPI_IO1 J1 B51 BSEL2 J...

Page 84: ...1 PCIe14_TX J1 B81 GND J1 A82 GND J1 B82 PCIe15_RX J1 A83 PCIe15_TX J1 B83 PCIe15_RX J1 A84 PCIe15_TX J1 B84 GND J1 A85 GND J1 B85 TEST NA J1 A86 VCC_RTC J1 B86 RSMRST_OUT J1 A87 SUS_CLK J1 B87 UART1_...

Page 85: ...B2 J1 D17 USB0 J1 C18 USB2 J1 D18 GND J1 C19 GND J1 D19 DDI0_SDA_AUX J1 C20 SNDW_DMIC_CLK1 J1 D20 DDI0_SCL_AUX J1 C21 SNDW_DMIC_DAT1 J1 D21 GND J1 C22 GND J1 D22 DDI0_PAIR0 J1 C23 SNDW_DMIC_CLK0 J1 D2...

Page 86: ...BOOT_SPI_IO2 J1 D52 SATA0_TX J1 C53 BOOT_SPI_IO3 J1 D53 SATA0_TX J1 C54 BOOT_SPI_CLK J1 D54 GND J1 C55 GND J1 D55 SATA1_RX J1 C56 PCIe_REFCLK0_HI J1 D56 SATA1_RX J1 C57 PCIe_REFCLK0_HI J1 D57 GND J1 C...

Page 87: ...3 PCIe07_TX J1 C84 PCIe07_RX J1 D84 GND J1 C85 GND J1 D85 NBASET0_MDI0 J1 C86 SMB_CLK J1 D86 NBASET0_MDI0 J1 C87 SMB_DAT J1 D87 GND J1 C88 SMB_ALERT J1 D88 NBASET0_MDI1 J1 C89 UART0_TX J1 D89 NBASET0_...

Page 88: ...D J2 E13 DDI2_PAIR2 J2 F13 RSVD J2 E14 GND J2 F14 RSVD J2 E15 DDI2_PAIR3 J2 F15 RSVD J2 E16 DDI2_PAIR3 J2 F16 RSVD J2 E17 GND J2 F17 RSVD J2 E18 DDI2_DDC_AUX_SEL J2 F18 RSVD J2 E19 DDI2_HPD J2 F19 GND...

Page 89: ...PCIe18_TX J2 F51 PCIe18_RX J2 E52 PCIe18_TX J2 F52 GND J2 E53 GND J2 F53 PCIe19_RX J2 E54 PCIe19_TX J2 F54 PCIe19_RX J2 E55 PCIe19_TX J2 F55 GND J2 E56 GND J2 F56 PCIe20_RX J2 E57 PCIe20_TX J2 F57 PC...

Page 90: ...J2 F83 RSVD J2 E84 RSVD J2 F84 RSVD J2 E85 RSVD J2 F85 GND J2 E86 GND J2 F86 ETH0_TX NA J2 E87 ETH0_RX NA J2 F87 ETH0_TX NA J2 E88 ETH0_RX NA J2 F88 GND J2 E89 GND J2 F89 ETH1_TX NA J2 E90 ETH1_RX NA...

Page 91: ...3_LSRX NA J2 H15 USB2_AUX NA J2 G16 USB3_LSTX NA J2 H16 GND J2 G17 USB2_LSRX NA J2 H17 USB3_AUX NA J2 G18 USB2_LSTX NA J2 H18 USB3_AUX NA J2 G19 PEG_LANE_REV J2 H19 GND J2 G20 GND J2 H20 PCIe40_TX J2...

Page 92: ...J2 H51 PCIe26_TX J2 G52 PCIe26_RX J2 H52 GND J2 G53 GND J2 H53 PCIe27_TX J2 G54 PCIe27_RX J2 H54 PCIe27_TX J2 G55 PCIe27_RX J2 H55 GND J2 G56 GND J2 H56 PCIe28_TX J2 G57 PCIe28_RX J2 H57 PCIe28_TX J2...

Page 93: ...H84 CSI1_CLK NA J2 G85 CSI0_CLK NA J2 H85 GND J2 G86 GND J2 H86 CSI1_I2C_CLK NA J2 G87 CSI0_I2C_CLK NA J2 H87 CSI1_I2C_DAT NA J2 G88 CSI0_I2C_DAT NA J2 H88 CSI1_MCLK NA J2 G89 CSI0_MCLK NA J2 H89 CSI1...

Page 94: ...D A22 SATA2_TX B22 SATA3_TX A23 SATA2_TX B23 SATA3_TX A24 SUS_S5 B24 PWR_OK A25 SATA2_RX B25 SATA3_RX A26 SATA2_RX B26 SATA3_RX A27 BATLOW B27 WDT A28 S ATA_ACT B28 N A A29 AC HDA_SYNC B29 AC HDA_SDIN...

Page 95: ...7 LVDS_VDD_EN B77 LVDS_B3 A78 LVDS_A3 B78 LVDS_B3 A79 LVDS_A3 B79 LVDS_BKLT_EN A80 GND FIXED B80 GND FIXED A81 LVDS_A_CK B81 LVDS_B_CK A82 LVDS_A_CK B82 LVDS_B_CK A83 LVDS_I2C_CK B83 LVDS_BKLT_CTRL A8...

Page 96: ...e D18 RSVD Note C19 PCIE_RX6 D19 PCIE_TX6 C20 PCIE_RX6 D20 PCIE_TX6 C21 GND FIXED D21 GND FIXED C22 PCIE_RX7 D22 PCIE_TX7 C23 PCIE_RX7 D23 PCIE_TX7 C24 DDI1_HPD D24 RSVD C25 N A Note D25 RSVD C26 N A...

Page 97: ...7 GND C68 PEG_RX5 D68 PEG_TX5 C69 PEG_RX5 D69 PEG_TX5 C70 GND FIXED D70 GND FIXED C71 PEG_RX6 D71 PEG_TX6 C72 PEG_RX6 D72 PEG_TX6 C73 GND D73 GND C74 PEG_RX7 D74 PEG_TX7 C75 PEG_RX7 D75 PEG_TX7 C76 GN...

Page 98: ...C25 could be an optional pin reserved for AUXDDI1_TBT_AUX Please contact FAE for details 7 C26 could be an optional pin reserved for AUXDDI1_TBT_AUX Please contact FAE for details 8 C27 could be an op...

Page 99: ...Appendix B B Watchdog Timer This appendix details information about the watchdog timer pro gramming on the SOM C350 CPU System on Module Sections include Watchdog Timer Programming...

Page 100: ...BIOS and then set to EC Only Win8 1 and Win10 support it In other OS it will still use IRQ number from BIOS setting as usual For details please refer to iManager Software API User Manual Trigger Event...

Page 101: ...Appendix C C Programming GPIO This Appendix details illustration of the General Purpose Input and Output pin settings Sections include GPIO Register...

Page 102: ...PIO Register For details please refer to iManager Software API User Manual GPIO Byte Mapping H W Pin Name BIT0 GPI0 BIT1 GPI1 BIT2 GPI2 BIT3 GPI3 BIT4 GPI4 BIT5 GPI5 BIT6 GPI6 BIT7 GPI7 BIT8 GPI8 BIT9...

Page 103: ...D System Assignments This appendix gives you the infor mation about the system resource allocation on the SOM C350 CPU System on Module Sections include System I O ports Interrupt Assignments 1st MB...

Page 104: ...0000092 Motherboard resources 0x000000B2 0x000000B3 Motherboard resources 0x00000680 0x0000069F Motherboard resources 0x0000164E 0x0000164F Motherboard resources 0x00000062 0x00000062 Microsoft ACPI C...

Page 105: ...000040 0x00000043 System timer 0x00000050 0x00000053 System timer 0x00003000 0x0000303F Intel R UHD Graphics 770 Table D 1 System I O ports Table D 2 Interrupt Assignments Interrupt Interrupt Source I...

Page 106: ...sources 0xFD6C0000 0xFD6CFFFF Motherboard resources 0xFD6F0000 0xFDFFFFFF Motherboard resources 0xFD6E0000 0xFD6EFFFF Intel R Serial IO GPIO Host Controller INT34C6 0xFD6D0000 0xFD6DFFFF Intel R Seria...

Page 107: ...000 0x505FFFFF Intel R Ethernet Controller 3 I225 LM 0x50600000 0x50603FFF Intel R Ethernet Controller 3 I225 LM 0x0000 0xFFFFFF Intel R UHD Graphics 0x0000 0xFFFFFFF Intel R UHD Graphics 0xFFEFB000 0...

Page 108: ...ions are subject to change without notice No part of this publication may be reproduced in any form or by any means electronic photocopying recording or otherwise without prior written permis sion fro...

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