PCL-818 Series User Manual
56
MUX Single-ended/differential channel indicator
0 8
differential
channels
1
16 single-ended channels
INT Data
valid
0
No A/D conversion has been completed since the last time
the INT bit was cleared. Values in the A/D data registers are
not valid data.
1
The A/D conversion has finished, and converted data is
ready. If the INTE bit of the control register (BASE +09H)
is set, an interrupt signal will be sent to the PC bus through
interrupt level IRQn, where n is specified by bits I2, I1 and
I0 of the control register. Though the A/D status register is
read-only, writing to it with any value will clear the INT bit.
CN3 to CN0 When EOC = 0, these status bits contain the channel number
of the next channel to be converted.
EOC can equal 0 in two different situations: the conversion has com-
pleted or no conversion has been started. Your software should therefore
wait for the signal INT = 1 before it reads the conversion data. It should
then clear the INT bit by writing any value to the A/D status register
BASE+08H.
Note:
This bit is used for PCL-818L.
Note:
If you trigger the A/D conversion with the on-
board pacer or an external pulse, your software
should check the INT bit, not the EOC bit, before
it reads the conversion data.
Summary of Contents for PCL-818 Series
Page 1: ...PCL 818 Series 12 bit ISA Multifunction Card User Manual ...
Page 14: ...PCL 818 Series User Manual 6 Figure 1 1 Installation Flow Chart ...
Page 28: ...PCL 818 Series User Manual 20 ...
Page 45: ...2 APPENDIX A Specifications ...
Page 49: ...2 APPENDIX B Block Diagram ...
Page 51: ...2 APPENDIX C Register Structure Format ...
Page 71: ...2 APPENDIX D Calibration ...