Advantech PCL-812PG User Manual Download Page 8

Chapter 1  General Information

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1.5.1 Analog Input (A/D Converter)

Channels:

16 single-ended

Resolution:

12 bits

Input Range:

B/- 10V, +/- 5V, +/- 2.5 V, +/- 1.25 V,
+/- 0.625 V, +/- 0.3125 V.  All input ranges are
software programmable.

Overvoltage:

Cont/- 30V max.

Conversion type:

Successive approximation

Converter:

HADC574Z (built-in sample and hold)

Conversion speed:

30 KHz max.

Accuracy:

0.015 % of r/- 1 bit

Linearity:

+/- 1 bit

Trigger mode:

Software trigger, on-board programmable timer
or external trigger.

Data transfer:

Program control, Interrupt control or DMA

External trigger

TTL or compatible, load 0.4 mA max. at 0.5V
(low) or 0.05 mA max. at 2.7V (high).

1.5.2 Analog Output (D/A Converter)

Channels:

2

Resolution:

12 bits

Output range:

0 to + 5V or 0 to +10V with fixed -5V or -10V
reference.  Max. +10V or -10V with external
DC or AC reference.

Reference voltage
   Internal:

-5V (+/- 0.1V), -10V (+/- 0.2 V)

   External:

DC or AC, +/- 10 V max

Conversion type:

12-bit monolithic multiplying

Analog devices:

AD7541AKN or equivalent

Linearity:

+/- 0.5 bit

Output drive:

+/- 5 mA max

Settling time:

30 microseconds

1.5.3 Digital Input

Summary of Contents for PCL-812PG

Page 1: ...PCL 812PG Enhanced Multi Lab Card User s Manual for PCL 812PG...

Page 2: ...or written permission of the original manufacturer Information provided in this manual is intended to be accurate and reliable However the original manufacturer assumes no responsibility for its use n...

Page 3: ...acking List Before installing your board insure that the following materials have been received If any of these items are missing or damaged contact your distributor or sales representative immediatel...

Page 4: ...er 1 General Information 9 9 9 9 9 1 General Information This chapter gives background information on the PCL 812PG Sections include Key Features Expansion Capabilities Product Specifications C H A P...

Page 5: ...A D sampling rate is 30 KHz in DMA mode Software programmable analog input ranges Bipolar 5V 2 5 V 1 25V 0 625 V 0 3125 V Three A D trigger modes Software trigger Programmable pacer trigger External p...

Page 6: ...Front End Board The board allows up to eight analog inputs to be acquired simultaneously with less than 30 ns of channel to channel sample time uncertainty PCLD 786 AC DC Power SSR and Relay Driver B...

Page 7: ...des powerful and easy to use software driver functions which can be accessed by referring a user defined parameter table These driver functions simplify programming especially when you want to use som...

Page 8: ...tware trigger on board programmable timer or external trigger Data transfer Program control Interrupt control or DMA External trigger TTL or compatible load 0 4 mA max at 0 5V low or 0 05 mA max at 2...

Page 9: ...5 Programmable Timer Counter Device Intel 8253 Counters 3 channels 16 bit 2 channels permanently connected to 2 MHz clock as programmable pacer 1 channel free for user application Input gate TTL DTL...

Page 10: ...ector 20 pin post header for I O connection Adapter available to convert to 37 pin D type connector I O base address Requires 16 consecutive address locations Base address definable by the Dip switche...

Page 11: ...arrangements to repair or replace the unit Remove the PCL 812PG interface card from its protective packaging by grasping the rear metal panel Keep the anti vibration packing Whenever you remove the ca...

Page 12: ...dresses for other devices Your PCL 812PG base address switch setting is set to hex 220 in the factory If you need to adjust it to some other address range the switch settings for various base addresse...

Page 13: ...Digital input D GND Digital and power supply ground CLK Clock input for the 8253 counter GATE Gate input for the 8253 counter OUT Signal output of the 8253 counter VREF Voltage reference Connector 1 C...

Page 14: ...D 0 3 D 0 4 5 6 D 0 5 D 0 6 7 8 D 0 7 D 0 8 9 10 D 0 9 D 0 10 11 12 D 0 11 D 0 12 13 14 D 0 13 D 0 14 15 16 D 0 15 D GND 17 18 D GND 5V 19 20 12V Connector 4 CN4 Digital Input D I 0 1 2 D I 1 D I 2 3...

Page 15: ...the back of the unit is facing you Remove the system unit cover refer to your computer s user s manual if necessary Locate the expansion slots at the rear of the unit and choose any unused slot Remov...

Page 16: ...17 17 17 2 Installation This chapter provides detailed installation information about the PCL 812PG Sections include Initial inspection Jumper settings Connector pin assignments Hardware installation...

Page 17: ...arrangements to repair or replace the unit Remove the PCL 812PG interface card from its protective packaging by grasping the rear metal panel Keep the anti vibration packing Whenever you remove the ca...

Page 18: ...dresses for other devices Your PCL 812PG base address switch setting is set to hex 220 in the factory If you need to adjust it to some other address range the switch settings for various base addresse...

Page 19: ...tions The clock input of channel 0 can be internal 2 MHz clock or external clock signal from connector CN5 pin 8 Internal 2 MHz clock External clock 2 2 6 IRQ Level Selection JP5 The interrupt caused...

Page 20: ...of PCL 812PG are 5V 2 5 V 1 25V 0 625V and 0 3125V If JP9 is set to the 10V range the analog input ranges are then 10V 5V 2 5V 1 25V and 0 625V The default setting of JP9 is the 5V range The user can...

Page 21: ...Digital input D GND Digital and power supply ground CLK Clock input for the 8253 counter GATE Gate input for the 8253 counter OUT Signal output of the 8253 counter VREF Voltage reference Connector 1 C...

Page 22: ...D 0 3 D 0 4 5 6 D 0 5 D 0 6 7 8 D 0 7 D 0 8 9 10 D 0 9 D 0 10 11 12 D 0 11 D 0 12 13 14 D 0 13 D 0 14 15 16 D 0 15 D GND 17 18 D GND 5V 19 20 12V Connector 4 CN4 Digital Input D I 0 1 2 D I 1 D I 2 3...

Page 23: ...the back of the unit is facing you Remove the system unit cover refer to your computer s user s manual if necessary Locate the expansion slots at the rear of the unit and choose any unused slot Remov...

Page 24: ...se standard functions written in common programming languages to operate the PCL 812PG without going into detailed register control Languages supported by the software driver include BASICA GWBASIC QU...

Page 25: ...he PCLD 789 user s manual The PCLD 774 analog expansion board is designed to accommodate multiple external signal conditioning daughterboards such as the PCLD 779 PCLD 789 PCLD 889 Featuring five sets...

Page 26: ...er using address BASE 10 The low nybble provides the scan channel number The multiplexer switches to the new channel when writing to this register Data Format Legend CL3 to CL0 Multiplexer channel num...

Page 27: ...Control Register The mode control register is a write only register using address BASE 11 This register provides the way to control the operating modes of the PCL 812PG Data Format A Under internal tr...

Page 28: ...ications program execution time The PCL 812PG uses the Intel 8253 programmable interval timer counter Counters 1 and 2 of the Intel 8253 are configured to be a pacer to offer A D converter trigger pul...

Page 29: ...apter 9 5 6 How to Execute an A D Conversion You may execute A D operations with a program writing all I O port instructions directly or by a program utilizing the PCL 812PG driver It is suggested tha...

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