Advantech PCI-1757UP, User Manual

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PCI-1757UP User Manual 18
3.2.4 Initial Configuration
The initial configuration of each port depends on the software or switch
SW2 setting of each port as input or output port, and on the setting of the
jumper JP1 for the hot reset type.
3.3 Interrupt Function
3.3.1 Interrupt Function of the D I/O Signals
Two I/O pins (PC0 and PC1) can be used to generate hardware interrupts.
The interrupt control register can be programmed (Base + 32) to select
the interrupt sources.
The "Interrupt Control Register" (Base + 32) controls the interrupt signal
source, edge and flag. Table 3-2 shows the bit map of the interrupt control
register. The register is a readable/writable register.
When writing to it, it is used as a control register, and when reading from
it, it is used as a status register.
M0 and M1: "mode bits" of port 0
E: triggering edge control bits
F: flag bits
X: ignore
Table 3.2: Interrupt Control Register Bit Map
Bit# D7 D6 D5 D4 D3 D2 D1 D0
X X X X F E M1 M0