Advantech PCI-1757UP, User Manual

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11 Chapter 2
PCI-1757UP emulates one 8255 programmable peripheral interface (PPI)
chip in mode 0, but with higher driving capability than a standard 8255
chip. Each of the 8255 chips has 24 programmable I/O pins that are
divided into two 8-bit ports and two 4-bit ports, designated PA, PB PCL
and PCH.
Each port can be programmed as an input or an output port. You can set
the corresponding ports to be configurable as input or output ports by
switch SW2 or software. When “IO CF.” position is “ON”, set the ports
to be input or output ports by the software. Else, when “IO CF.” position
is “Off”, you can set the ports by the switch SW2 directly. The position
setting is “ON”, the corresponding port is input port; else position is
“OFF”, the corresponding port is output port.
2.3.3 Output Signal at Hot Reset Setting (JP1)
As shown below, JP1 is used to set the output signal after a hot reset.
Table 2.3: Hot Reset Mode Setting
JP1 Output Signals Status after Hot Reset
Hot Reset Output Memory.
Remember the last output signals and I/O
settings before reset and keep these val-
ues on power up.
Default Output Setting
Clear the I/O configuration to default if hot
reset.
Note The reset must be a "hot" reset (power not dis-
connected) for enabled JP1 to return ports to
their prior values. Otherwise, the card behaves
as though JP1 was not enabled.