57
Chapter 4
4.5.10 Base+18h: Counter Data Register Low byte
4.5.11 Base+19h: Counter Data Register High Byte
4.5.12 Base+1Ah: Counter Gate Control Register
CNT_EN: Counter Gate Control status
0: Disable
1: Enable
4.5.13 Base+1Bh: Counter Load Trigger
Write
D7
D6
D5
D4
D3
D2
D1
D0
Counter DATA (Low Byte)
Read
D7
D6
D5
D4
D3
D2
D1
D0
Counter DATA (Low Byte)
Write
D7
D6
D5
D4
D3
D2
D1
D0
Counter DATA (High Byte)
Read
D7
D6
D5
D4
D3
D2
D1
D0
Counter DATA (High Byte)
Write
D7
D6
D5
D4
D3
D2
D1
D0
-
-
-
-
-
-
-
CNT_EN
Read
D7
D6
D5
D4
D3
D2
D1
D0
-
-
-
-
-
-
-
CNT_EN
Write
D7
D6
D5
D4
D3
D2
D1
D0
Load counter setting value into chip
Read
D7
D6
D5
D4
D3
D2
D1
D0
X
Summary of Contents for PCI-1243U
Page 1: ...PCI 1243U 4 Axis Stepping Motor Control Card User Manual ...
Page 8: ...PCI 1243U User Manual viii ...
Page 14: ...PCI 1243U User Manual 6 ...
Page 35: ...27 Chapter3 Figure 3 8 Point to Point Movement ...
Page 38: ...PCI 1243U User Manual 30 ...
Page 80: ...PCI 1243U User Manual 72 Appendix A Diagrams A 1 Jumper and Switch Layout ...
Page 82: ...PCI 1243U User Manual 74 ...
Page 88: ...PCI 1243U User Manual 80 ...