Advantech MIC-3392 User Manual Download Page 72 | Manualshive

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© Advantech Co., Ltd. 2007

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Summary of Contents for MIC-3392

Page 1: ...User Manual MIC 3392 6U CompactPCI Intel Core 2 Duo Processor Based Board with Dual PCIe GbE DDR2 SATA PMC...

Page 2: ...ion Advantech assumes no liability under the terms of this warranty as a consequence of such events Because of Advantech s high quality control standards and rigorous testing most of our customers nev...

Page 3: ...residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense FM This equipment has passed the FM certification Accor...

Page 4: ...Single PMC version or x2 Dual PMC ver sion Solder side cover Assembled x1 RJ45 to DB9 cable x1 Several screws Warranty certificate document x1 Safety Warnings CE FCC class A If any of these items are...

Page 5: ...id into an opening This may cause fire or electrical shock 13 Never open the equipment For safety reasons the equipment should be opened only by qualified service personnel 14 If one of the following...

Page 6: ...nen Brand bzw elektrischen Schlag ausl sen 13 ffnen Sie niemals das Ger t Das Ger t darf aus Gr nden der elektrischen Sicherheit nur von authorisiertem Servicepersonal ge ffnet werden 14 Wenn folgende...

Page 7: ...amage To avoid electrical shock always disconnect the power from your PC chassis before you work on it Don t touch any components on the CPU card or other cards while the PC is on Disconnect power bef...

Page 8: ...MIC 3392 User Manual viii...

Page 9: ...iagram 8 Figure 1 1 MIC 3392 functional block diagram 8 1 4 Jumpers and Switches 9 Table 1 4 MIC 3392 jumper descriptions 9 Table 1 5 MIC 3392 switch descriptions 9 1 4 1 Jumper Settings 9 Table 1 6 J...

Page 10: ...25 Figure 2 6 LAN SMBus Configuration 25 Table 2 1 Select SMBus mode 25 2 4 3 IDE Configuration 26 Figure 2 7 IDE Configuration 26 2 4 4 Floppy Configuration 27 Figure 2 8 Floppy Configuration 27 2 4...

Page 11: ...10 SDR Device commands 42 3 3 9 FRU data 42 Table 3 11 FRU Device commands 42 3 3 10 Sensors and Threshold configuration 43 Table 3 12 Sensor List 43 Table 3 14 Sensor Device Commands 44 Table 3 13 T...

Page 12: ...e C 1 LPC I O registers address 58 C 2 1 Debug Message 58 Table C 2 Debug_Code 7 0 LPC I O address 80H 58 C 2 2 Watchdog Register 58 Table C 3 Watchdog 7 0 LPC I O address 443H 58 C 2 3 Watchdog Disab...

Page 13: ...Chapter 1 1 Hardware Configuration This chapter describes how to configure MIC 3392 hardware...

Page 14: ...de bus to access the same system mem ory To save power address and data buffers are turned off when there is no activity The MIC 3392 maximizes I O throughput with PCI Express PCIe technology It sup p...

Page 15: ...The Mobile Intel 945GM Express 945GME chipset provides excellent flexibility for developers of embedded applications by offering improved graphics and increased I O bandwidth over previous Intel chip...

Page 16: ...S 64x8 Apacer 256 MB DDR2 533 78 82054 420 ELPIDA JAPAN E5116AB 5C E 05050WPWA 64x8 512 MB DDR2 533 78 92051 421 ELPIDA JAPAN E5108AB 5C E 04520WR5Q 64x8 1 GB DDR2 533 78 02051 423 ELPIDA TWN E5108AE...

Page 17: ...to a rear I O module via the J3 connector 1 2 9 Serial ports One RJ 45 COM1 port RS 232 interface is provided on the front panel A COM2 port is routed to a rear I O module via the J5 connector 1 2 10...

Page 18: ...X PCI 6254 is electrically isolated from the CompactPCI bus The MIC 3392 receives power from the backplane supports rear I O and supports PICMG 2 16 Consult the PLX PCI 6254 Hint HB6 datasheet for mor...

Page 19: ...st PMC2 supports a 32 bit 33 MHz PCI bus interface PMC1 supports 3 3 V VIO only whereas PMC2 supports both 3 3 V and 5 V VIO The two layer front panel design complies with IEEE 1101 10 Connectors are...

Page 20: ...Controller APIC The ICH7 timer registers are memory mapped in a non indexed scheme The choice of address range will be selected by configuration bits in the HPET The ICH7 incorporates an APIC that can...

Page 21: ...IO setting JP4 PMC1 PCI bus frequency setting Table 1 5 MIC 3392 switch descriptions Number Function SW5 1 LAN for BMC SW5 2 SATA HDD channel Setting SW5 3 SW5 4 COM2 to console or BMC setting SW6 IPM...

Page 22: ...cts the LAN port that is used for Serial Over LAN SoL functionality The 10 100 LAN3 port is routed to the rear I O but is not currently implemented on stan dard Advantech Rear I O modules SW5 2 select...

Page 23: ...ware can be re programmed by setting switch 6 to BMC firmware programmable mode The MIC 3392 default setting is Master Table 1 13 SW5 3 SW5 4 COM2 to console or BMC SW5 3 SW 5 4 SIO COM2 to BMC Defaul...

Page 24: ...11 lists the function of each connector and Figure 1 2 illustrates each connector location Table 1 17 MIC 3392 connector descriptions Number Function VCN1 VGA Connector CN9 COM1 RJ45 CN11 USB port 1 C...

Page 25: ...nt the RS 232 standard in differ ent ways If you are having problems with a serial device be sure to check the pin assignments for the connector The IRQ and address range for both ports are fixed Howe...

Page 26: ...utton The MIC 3392 provides a system reset button located on the front panel The system reset button resets all payload and application related circuitry It does not reset the system management IPMI r...

Page 27: ...move the screws from the solder side cover During this step the front panel should also loosen Be careful not to damage the SBC during disassembly 2 Remove the last four screws from the heat sink and...

Page 28: ...U Thermal paste 1 x Heatsink 4 x screws 4 x springs 2 Apply thermal paste to the top of the CPU die 3 On the CPU interposer socket turn the top screw to the open direction to ensure that it is in the...

Page 29: ...using the following part number 1750129010 BATTERY 3V 210 mAh with WIRE ASS YCR2032M1S8 LF 1 Remove the battery from the board by unplugging the connector and pulling away the battery cover from the b...

Page 30: ...MIC 3392 User Manual 18...

Page 31: ...Chapter 2 2 AMI BIOS Setup This chapter describes how to configure the AMI BIOS...

Page 32: ...ngs and control the special features of the MIC 3392 The Setup program uses a number of menus for making changes and turning the special features on or off This chapter describes the basic navigation...

Page 33: ...t BIOS supports your CPU If there is no number assigned to the patch code please contact an Advantech application engineer to obtain an up to date patch code file This will ensure that your CPU s syst...

Page 34: ...an be configured Grayed out options cannot be configured whilst options in blue can The right frame displays the key legend Above the key legend is an area reserved for a text message When an option i...

Page 35: ...f the items in the left frame of the screen such as CPU Configuration to go to the sub menu for that item You can display an Advanced BIOS Setup option by highlighting it using the Arrow keys All Adva...

Page 36: ...Technology to work with operating systems that do not support extra CPUID information provided by the processor 2 4 1 2 CPU TM function This item specifies the Thermal Monitor Feature If set to Enable...

Page 37: ...thernet ports are connected There are 3 options Front Default PICMG 2 16 and Rear I O board 2 4 2 2 Select SMBus mode This setting indicates whether remote management is performed by Advantech s MIC 3...

Page 38: ...ables up to 2 IDE channels for OS s requiring legacy IDE operation default setting and Enhanced enables all SATA and PATA resources 2 4 3 2 Legacy IDE Channels Four options are available SATA Only Res...

Page 39: ...nual Chapter 2 AMI BIOS Setup 2 4 4 Floppy Configuration Figure 2 8 Floppy Configuration Floppy A Select the type of floppy drive connected to the system Floppy B Select the type of floppy drive conne...

Page 40: ...or disable the floppy controller Serial Port1 Address Used to select Serial Port1 base addresses Serial Port2 Address Used to select Serial Port2 base addresses Parallel Port Address Used to select Pa...

Page 41: ...4 6 ACPI Setting Figure 2 10 ACPI Setting The options for ACPI Aware O S are Yes or No in order to enable or disable ACPI support for the operating system The default is Yes 2 4 7 Hardware Health Conf...

Page 42: ...and Fail Safe default setting is Enabled 2 4 8 2 Serial Port Number Select the serial port you want to use for console redirection You can set the value for this option to either ICH COM1 or ICH COM2...

Page 43: ...ug and Play BIOS Setup screen is shown below Figure 2 13 PCI PNP Setup 2 5 1 Clear NVRAM Set this value to force the BIOS to clear the Non Volatile Random Access Memory NVRAM The Optimal and Fail Safe...

Page 44: ...MIC 3392 User Manual 32 2 6 Boot Setup Figure 2 14 Boot Setup 2 6 1 Boot Settings Configuration Figure 2 15 Boot Settings Configuration...

Page 45: ...Hit DEL Message Display Displays Press DEL to run Setup in POST 2 7 Security Setup Figure 2 16 Password Configuration Select Security Setup from the MIC 3392 Setup main BIOS setup menu All Security S...

Page 46: ...MIC 3392 User Manual 34 2 8 Advanced Chipset Settings Figure 2 17 Advanced Chipset Setting 2 8 1 North Bridge Chipset Configuration Figure 2 18 North Bridge Configuration...

Page 47: ...667MHz Boots Graphic Adapter Priority Select which graphics controller to use as the primary boot device 2 8 2 South Bridge Configuration Figure 2 19 South Bridge Configuration USB 2 0 Controller Enab...

Page 48: ...p without making any permanent changes to the sys tem configuration 1 Select Exit Discarding Changes from the Exit menu and press Enter The fol lowing messages appear on the screen Discard Changes and...

Page 49: ...Chapter 3 3 IPMI This chapter describes IPMI con figuration...

Page 50: ...updating over serial port 1 hardware monitor 1 interrupt input Sensors threshold configuration Complete IPMI watchdog functionality reset power down power cycle Platform even filtering PEF and alert...

Page 51: ...re flash update Serial Port 0 is selected for OOB serial port LAN channel OOB management over LAN is accomplished by a sharing a NIC LAN2 or LAN3 This messaging interface channel connects the H8S 2167...

Page 52: ...uthentication Capabilities App 0x38 O Get Session Challenge App 0x39 O Activate Session App 0x3a O Set Session Privilege Level App 0x3b O Close Session App 0x3c O Get Session Information App 0x3d O Ge...

Page 53: ...8 O Get System Boot Options Chassis 0x09 O Set Front Panel Button Enables Chassis 0x0a O Set Power Cycle Interval Chassis 0x0b O Table 3 7 Event commands Event Commands NetFn Cmd Mandatory Optional Se...

Page 54: ...onal Get SEL Info Storage 0x40 M Reserve SEL Storage 0x42 O Get SEL Entry Storage 0x43 M Add SEL Entry Storage 0x44 M Clear SEL Storage 0x47 M Get SEL Time Storage 0x48 M Set SEL Time Storage 0x49 M T...

Page 55: ...h Timer Expired status only 01h Hard Reset 02h Power Down 03h Power Cycle N A Power Failure 52h C0h 6Fh 00h Power Failure 00h Power Failure 07h over 75 full SEL Full 64h D0h 01h 09h over 90 full 0Bh 1...

Page 56: ...N A N A N A N A N A Positive going 0x02 0x02 0x02 0x02 0x02 Negative going 0x02 0x02 0x02 0x02 0x02 Table 3 14 Sensor Device Commands Sensor Device Commands NetFn Cmd Mandatory Optional Set Sensor Hys...

Page 57: ...nt OS will then perform a graceful shutdown and light the blue LED whereas a non compliant OS will just shut down Note The Network function NetFn field identifies the functional class of the message T...

Page 58: ...MIC 3392 User Manual 46...

Page 59: ...Appendix A A Pin Assignments This appendix describes pin assignments...

Page 60: ...8 AD26 GND V I O AD25 AD24 GND 9 C BE3 IDSEL AD23 GND AD22 GND 10 AD21 GND 3 3V AD20 AD19 GND 11 AD18 AD17 AD16 GND C BE2 GND 12 Key Area 13 GND 14 15 3 3V FRAME IRDY BD_SEL TRDY GND 16 DEVSEL PCIXCA...

Page 61: ...60 GND 7 AD59 GND V I O AD58 AD57 GND 8 AD56 AD55 AD54 GND AD53 GND 9 AD52 GND V I O AD51 AD50 GND 10 AD49 AD48 AD47 GND AD46 GND 11 AD45 GND V I O AD44 AD43 GND 12 AD42 AD41 AD40 GND AD39 GND 13 AD38...

Page 62: ...D_DSA GND 7 FDD_DIR PATA_ACK PATA_RST PDIORDY PATA_CS 1 GND 8 IRQ15 PATA_DETECT PATA_DA0 PATA_DA1 PATA_DA2 GND 9 CF_LED RIO_CLOCK PATA_IOW PATA_REQ PATA_CS 3 GND 10 PATA_D15 PATA_D14 PATA_IOR PATA_D10...

Page 63: ...OM2_CTS PS2_KBCLK GND 10 COM2_DCD NC COM2_RI COM2_DSR PS2_MSDAT GND 11 COM1_RX COM1_CTS NC NC PS2_MSCLK GND 12 COM1_TX COM1_DSR NC LAN3 ACT VGA_DAT GND 13 COM1_RTS COM1_DTR NC LAN3 LNK VGA_CLK GND 14...

Page 64: ...GND Table A 8 BT1 CMOS battery 1 BAT_VCC 2 GND Table A 9 CN10 CF socket 1 GND 2 D3 3 D4 4 D5 5 D6 6 D7 7 CS1 8 GND 9 GND 10 GND 11 GND 12 GND 13 5V 14 GND 15 GND 16 GND 17 GND 18 A2 19 A1 20 A0 21 D0...

Page 65: ...ND 4 SATA_TX0P 5 GND 6 SATA_TX0N 7 GND 8 GND 9 GND 10 SATA_RX0N 11 GND 12 SATA_RX0P 13 GND 14 GND 15 RSV 3 3V 12V 16 5V 17 RSV 3 3V 12V 18 5V 19 RSV 3 3V 12V 20 5V Table A 11 RJ1 LAN1 Connector 1 LANM...

Page 66: ...Hot swap LEDs Name Description 1 M D Green Indicates Master or Drone mode status 2 PWR Green Indicates the power status 3 IDE Hot swap Yellow Blue Indicates IDE activity when yellow or that the board...

Page 67: ...Appendix B B Programming the Watchdog Timer This appendix describes how to program the watchdog timer...

Page 68: ...r by rewriting the I O port 443 and 043 hex while simultaneously setting it When you want to disable the watchdog timer your program should read I O port 043 hex The following example shows how you mi...

Page 69: ...Appendix C C CPLD This appendix describes CPLD configuration...

Page 70: ...other signals in the Miscellaneous Unit are for interfacing with corresponding I O interface signals C 2 1 Debug Message C 2 2 Watchdog Register Table C 1 LPC I O registers address LPC Address I O Ty...

Page 71: ...4 CPLD Ver sion units xxh xxh Read I O port 444h to get the CPLD version in BCD E g for v1 4 the return value is Bit 7 6 5 4 0 0 0 1 3 0 CPLD Ver sion tenths xxh xxh Read I O port 444h to get the CPL...

Page 72: ...tions are subject to change without notice No part of this publication may be reproduced in any form or by any means electronic photocopying recording or otherwise without prior written permis sion of...

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