Advantech MIC-3392, User Manual

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MIC-3392 User Manual 6
1.2.14 Mechanical and Environmental Specifications
! Operating temperature : 0 ~ 55° C (32 ~ 122° F)
! Storage Temperature : -20 ~ 60° C (-4 ~ 140° F).
! Humidity (Non-operating) : 5 ~ 95% @ 60° C (non-condensing)
! Power Consumption : (Intel Core 2 Duo and 2 GB memory)
+5 V @ 7.16 A; +3.3 V @ 3.17 A; +12 V @ 0.40 A
! Board size : 233.35 x 160 mm (6U size), 1-slot (4 TE) wide
! Weight : 0.8 kg (1.76 lb)
! Shock : 20 G (operating); 50 G (non-operating)
! Random vibration : 1.5 Grms (operating), 2.0 Grms (non-operating)
1.2.15 Compact Mechanical Design
The MIC-3392 has a specially designed CPU heat sink to enable fanless operation.
Forced air cooling in the chassis is needed for operational stability and reliability.
1.2.16 CompactPCI Bridge
The MIC-3392 uses a PLX PCI-6254 (Hint HB6) universal bridge as a gateway to an
intelligent subsystem. When configured as a system controller, the bridge acts as a
standard transparent PCI-to-PCI bridge. As a peripheral controller it allows the local
MIC-3392 processor to configure and control the onboard local subsystem indepen-
dently from the CompactPCI bus host processor. The MIC-3392 local PCI subsystem
is presented to the CompactPCI bus host as a single CompactPCI device. Finally,
when the MIC-3392 is in drone mode, the PLX PCI-6254 is electrically isolated from
the CompactPCI bus. The MIC-3392 receives power from the backplane, supports
rear I/O and supports PICMG 2.16. Consult the PLX PCI-6254 (Hint HB6) datasheet
for more details. The PLX PCI-6254 PCI bridge provides the following features:
! PCI Interface
– Full compliance with the PCI Local Bus Specification, Revision 2.2
– Supports 3.3 V or 5 V VIO operation
– Concurrent local and CompactPCI bus operation
! Buffer Architecture
– Queuing of multiple transactions in either direction
– 256 bytes of posted write (data and address) buffering in each direction and
256 bytes of read data buffering in each direction
!
Configuration Register and Control/Status Registers (CSRs)
– Two sets of standard PCI configuration registers for local and CompactPCI
interfaces, accessible from either the local or CompactPCI interface
– Three 32-bit base address configuration registers mapping the CSRs
! Transaction Forwarding
– Three primary interface base address configuration registers for downstream
forwarding with programmable size and prefetch for all three address ranges
– Direct offset address translation for downstream memory and I/O transac-
tions
– Three secondary interface address ranges for upstream forwarding, with pro-
grammable size and prefetch for all three address ranges
Note! The operating temperature range of the MIC-3392 depends on the
installed processor and the airflow through the chassis.