Advantech FWA-1320, User Manual

Page: 37 / 90

27 FWA-1320 User Manual
C
h
ap
te
r 2
P
ro
du
ct
S
pe
cif
ic
ati
on
2.4.8.3 PCIe Tree
The BIOS also performs an enumeration of all PCIe resources, builds a bus/device
map and assigns resources to the PCIe devices. Most OSes perform a reallocation of
resources during start up. However, the PCIe bus/device map will not be changed by
the OS. The table below gives an overview of the PCIe devices and their correspond-
ing system function:
Table 2.15: PCIe Devices
PCIe bus:
dev:fun PCIe VenID:
DevID
Device Description
00:00:00 8086:1f0b Host bridge
Intel Atom C2000 SoC Transaction
Router
00:01:00 8086:1f10 PCI bridge Intel Atom C2000 PCIe Root Port 1
00:02:00 8086:1f11 PCI bridge Intel Atom C2000 PCIe Root Port 2
00:02:00 8086:1f12 PCI bridge Intel Atom C2000 PCIe Root Port 3
00:0b:00 8086:1f18 Co-processor
Intel Atom C2000 nCPM for QuickAssist
Technology
00:0e:00 8086:1f14 Host bridge Intel Atom C2000 RAS
00:0f:00 8086:1f16 IOMMU Intel Atom processor RCEC
00:13:00 8086:1f15
System periph-
eral
Intel Atom C2000 SMBus 2.0 Controller
00:14:00 8086:1f41
Ethernet control-
ler Intel I354 connected to traffic port
labelled “1”
00:14:01 8086:1f41
Ethernet control-
ler Intel I354 connected to traffic port
labelled “2”
00:14:02 8086:1f41
Ethernet control-
ler Intel I354 connected to traffic port
labelled “3”
00:14:03 8086:1f41
Ethernet control-
ler Intel I354 connected to traffic port
labelled “4”
00:16:00 8086:1f2c USB controller
Intel Atom C2000 USB Enhanced Host
Controller
00:17:00 8086:1f22 SATA controller
Intel Atom C2000 AHCI SATA2 Control-
ler
00:18:00 8086:1f32 SATA controller
Intel Atom C2000 AHCI SATA3 Control-
ler
00:1f:00 8086:1f38 ISA bridge
Intel Atom C2000 PCU Legacy Bus
Bridge (LPC, legacy devices)
00:1f:03 8086:1f3c
S
MBus
Intel Atom C2000 PCU SMBus
(SMBus Controller 0)
02:00:00 8086:1533
Ethernet control-
ler Intel I210 connected to management
port labelled “MGT0”
03:00:00 8086:1533
Ethernet control-
ler Intel I210 connected to management
port labelled “MGT1”