Advantech AIMB-215 B1, User Manual

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59 AIMB-215 B1 User Manual
Chapter 3
B
IOS Operation
 IDO Request Enable
If supported by the hardware and set to “Enabled”, this item allows users to set
the number of ID-based ordering (IDO) bit (Attribute[2]) requests to be initiated.
 IDO Completion Enable
If supported by the hardware and set to “Enabled”, this item allows users to set
the number of IDO bit (Attribute[2]) requests to be initiated.
 LTR Mechanism Enable
If supported by the hardware and set to “Enabled”, the Latency Tolerance
Reporting (LTR) mechanism will be activated.
 End-End TLP Prefix Blocking
If supported by the hardware and set to “Enabled”, this function blocks the for-
warding of TLPs that contain End-End TLP Prefixes.
PCI Express Gen2 Link Register Settings
 Target Link Speed
If supported by the hardware and set to “Force to 2.5 GT/s” to downstream
ports, users can determine the upper limit link operation speed by restricting the
values specified by the upstream component in its training sequences. When
the “Auto” option is selected, HW-initialized data will be used.
 Clock Power Management
If supported by the hardware and set to “Enabled”, the device is permitted to
use CLKREQ# signals to manage the link clock power according to the protocol
defined in an appropriate form factor specification.
 Compliance SOS
If supported by the hardware and set to “Enabled”, this option forces the LTSSM
to send SKP-ordered sets between sequences when sending compliance pat-
terns or modified compliance patterns.
 Hardware Autonomous Width
If supported by the hardware and set to “Disabled”, the ability to alter the link
width using the hardware is disabled, except by reducing the size to correct
unstable link operation.
 Hardware Autonomous Speed
If supported by the hardware and set to “Disabled”, the ability to alter link speed
using the hardware is disabled, except by reducing the speed to correct unsta-
ble link operation.