ADLINK Technology NuPRO-860 Series, User Manual

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42 Watchdog Timer
Offset 68H: WDT Lock Register
Bit 2 is used to choose the functionality of the timer. (0 =
Watchdog Timer mode, 1 = Free running mode) The free-run-
ning mode ignores the first stage and only uses Preload Value
2. In free-running mode it is not necessary to reload the timer
as it is done automatically every time the down-counter
reaches zero.
Bit 1 enables or disables the WDT. (0 = Disabled, 1 = Enabled)
Bit 0 will lock the values of this register until a hard reset occurs
or power is cycled. (0 = unlocked, 1 = locked). The default is
Unlocked.
5.3 WDT Programming Procedure
1. Make sure WDT_TOUT# signal is enabled (not
GPIO[32] function).
2. Set WDT output enable, presecaler and interrupt type
into the WDT configuration register.
3. Get control base from the Base Address register.
4. Program Preload register’s value according to unlocking
sequence.
5. Set WDT timer mode into WDT Lock Register.
6. Enable WDT from WDT Lock register and program the
functionality of the WDT LED.
To keep the timer from causing an interrupt or driving
WDT_TOUT#, the timer must be reloaded periodically. The fre-
quency of reloads required is dependent on the value of the pre-
load values. To reload the down-counter, the register unlocking
sequence must be performed.
To disable WDT, set bit 1 of WDT Lock Register to 0.
5.4 WDT Utilities
Users can download the Intel® Watchdog Timer Control (Demo)
Windows application from
http://downloadfinder.intel.com/ . Enter
”6300ESB” in the search window and download the Embedded
Drivers zip file. You will find the demo application in the Applications
folder.