Introduction
13
HDV62A
1.6.2
FPGA Boot Flash Selection Switch (SW4)
Figure 1-8: Flash Selection Switch
Table 1-6: Flash Selection Settings
1.7
Optional Connections
ADLINK provides expanded connectivity with a variety of optional
cable solutions, available to HDV62A users.
1.7.1
YPbPr/S-Video/CVBS I/O Bracket
3x SMB to BNC + 1x 10-pin to CVBS/S-Video cables with I/O
bracket allow external connection of YPbPr and CVBS/S-Video
Boot Flash
Switch (Bit2,Bit1)
Working Flash (default)
OFF,OFF
Golden Flash
ON,ON
NOTE:
NOTE:
While the default FPGA boot flash is the Working Flash, if firm-
ware update fails and device malfunction occurs, changing the
boot flash to Golden Flash will allow reboot.
Summary of Contents for HDV62A
Page 8: ...viii Table of Contents This page intentionally left blank ...
Page 10: ...x List of Figures This page intentionally left blank ...
Page 12: ...xii List of Tables This page intentionally left blank ...
Page 23: ...Introduction 11 HDV62A 1 6 Switch Settings Figure 1 6 Switch Locations on PCB B B A ...
Page 32: ...20 Introduction This page intentionally left blank ...
Page 36: ...24 Getting Started 4 Select Next until driver installation is completed ...
Page 39: ...Getting Started 27 HDV62A 8 Select Yes to restart the system ...
Page 47: ...Getting Started 35 HDV62A ...
Page 62: ...50 Getting Started This page intentionally left blank ...
Page 69: ...DirectShow Programming Guide 57 HDV62A Figure 3 3 Audio Format Dialog ...
Page 70: ...58 DirectShow Programming Guide Figure 3 4 Video Proc Amp Dialog ...
Page 71: ...DirectShow Programming Guide 59 HDV62A Figure 3 5 Video Decoder Dialog ...
Page 106: ...94 EDID Default Settings This page intentionally left blank ...