ADLINK Technology Express-KL2 User Manual Download

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Express-KL2

Connector Pinouts on Module

4.6. Switch Settings

Switch Locations

BIOS Select and Mode Configuration Switch

PCI Express Configuration Switch

Figure 5: cExpress Switch Locations

4.6.1.

PCI Express Configuration Switch.

The PCI Express Configuration Switch allows you to configure the PCI Express x16 lanes from the CPU as 1 PCIe
x16, 2 PCIe x8, or 1 PCIe x8 + 2 PCIe x4.

Mode

Pin 1

Pin 2

1x PCIe x16 (default)

Off

2x PCIe x8

Off

1x PCIe x8 + 2x PCIe x4

Reserved

Off

Table 5: PCI Express Configuration Switch Settings

Summary of Contents for Express-KL2

Page 1: ...DGE COMPUTING Express KL2 User s Manual COM Express Basic Size Type 2 Module with 64 bit 7th Gen Intel Core Xeon E3 and Celeron processors Manual Rev 1 0 Revision Date October 28 2019 Part Number 50 1...

Page 2: ...damages Environmental Responsibility ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the European Union s Restriction of Hazardou...

Page 3: ...Operating Systems 6 2 16 Functional Diagram 7 2 17 Mechanical Drawing 8 3 Pinouts and Signal Descriptions 9 3 1 AB CD Pin Definitions 9 3 2 Signal Description Terminology 12 3 3 AB Signal Descriptions...

Page 4: ...ructure 47 7 2 Main 48 7 3 Advanced 52 7 4 Boot 69 7 5 Security 70 7 6 Save Exit 71 8 BIOS Checkpoints Beep Codes 73 8 1 Status Code Ranges 74 8 2 Standard Status Codes 74 8 3 OEM Reserved Checkpoint...

Page 5: ...iagram 7 Figure 2 Express KL2 Mechanical Drawing 8 Figure 3 Express KL2 Connector Switch and LED Locations 27 Figure 4 Express KL2 and the DB40 Debug Module 28 Figure 5 cExpress Switch Locations 33 Fi...

Page 6: ...able 3 Express KL2 LED Descriptions 30 Table 4 Fan Connector Pin Definition 31 Table 5 PCI Express Configuration Switch Settings 33 Table 6 BIOS Select and Mode Configuration Switch Settings 34 Table...

Page 7: ...dia Interface provide high speed connectivity to the Mobile Intel QM175 HM175 CM238 Chipset Integrated Intel Generation 9 Graphics includes features such as OpenGL 4 4 4 3 4 2 DirectX 11 Intel Clear V...

Page 8: ...2 Introduction This page intentionally left blank...

Page 9: ...Device Protection Technology with Intel Secure Key Intel TSXNI Note Availability of features may vary between processor SKUs Cache 8MB for Xeon Core i7 6MB for Core i5 3MB for Core i3 Memory Dual chan...

Page 10: ...Interface support through DP to VGA chip LVDS Interface single dual channel 18 24 bit LVDS through eDP to LVDS chip supports DE mode and Hsync Vsync mode max resolution 1920x1200 60Hz in dual mode pix...

Page 11: ...e connector to be used with DB 40 debug module Supports BIOS POST code LED BMC access SPI BIOS flashing power testpoints debug LEDs z 60 pin XDP header for ICE debug of CPU chipset 2 10 Power Specific...

Page 12: ...ing 5 90 RH non condensing Storage 5 95 RH and operating with conformal coating Shock and Vibration IEC 60068 2 64 and IEC 60068 2 27 MIL STD 202F Method 213B Table 213 I Condition A and Method 214A T...

Page 13: ...I HD Audio 3x SATA 6Gb s port 0 1 2 8x USB 2 0 SPI 1 BIOS DDC I2C SODIMM 2 2133 2400 MHz DDR4 SPI_CS DDI 1 DP HDMI DVI DDI 2 DP HDMI DVI single dual 18 24 bit LVDS 6x PCIe x1 Gen3 port 0 5 New SEMA BM...

Page 14: ...dimensions shown in millimeters Tolerances should be 0 25mm 0 010 unless otherwise noted The tolerances of the module connector locating peg holes dimensions 16 50 6 00 and 16 50 18 00 should be 0 10...

Page 15: ...N C12 IDE_D14 D12 IDE_IRQ A13 GBE0_MDI0 B13 SMB_CK C13 IDE_IORDY D13 IDE_A0 A14 GBE0_CTREF B14 SMB_DAT C14 IDE_IOR D14 IDE_A1 A15 SUS_S3 B15 SMB_ALERT C15 PCI_PME D15 IDE_A2 A16 SATA0_TX B16 SATA1_TX...

Page 16: ...E_RV A55 PCIE_TX4 B55 PCIE_RX4 C55 PEG_RX1 D55 PEG_TX1 A56 PCIE_TX4 B56 PCIE_RX4 C56 PEG_RX1 D56 PEG_TX1 A57 GND B57 GPO2 C57 TYPE1 D57 TYPE2 A58 PCIE_TX3 B58 PCIE_RX3 C58 PEG_RX2 D58 PEG_TX2 A59 PCIE...

Page 17: ...GPO0 B93 VGA_HSYNC C93 GND D93 GND A94 SPI_CLK B94 VGA_VSYNC C94 PEG_RX13 D94 PEG_TX13 A95 SPI_MOSI B95 VGA_I2C_CK C95 PEG_RX13 D95 PEG_TX13 A96 GND B96 VGA_I2C_DAT C96 GND D96 GND A97 TYPE10 B97 SPI...

Page 18: ...O 5V Output 5V signal level I O 3 3V Bi directional signal 3 3V tolerant I O 5V Bi directional signal 5V tolerant I O 3 3Vsb Input 3 3V tolerant active in standby state P Power Input Output REF Refere...

Page 19: ...g VGA Signal Pin Description I O PU PD Comment VGA_RED B89 Red for monitor Analog DAC output designed to drive a 37 5 Ohm equivalent load O Analog PD 150R Shall also be terminated on the carrier with...

Page 20: ...DDC lines used for flat panel detection and control I O OD 3 3V PU 2k2 3 3V 3 3 4 Gigabit Ethernet Gigabit Ethernet Pin Description I O PU PD Comment GBE0_MDI0 GBE0_MDI0 GBE0_MDI1 GBE0_MDI1 GBE0_MDI2...

Page 21: ...ed on Module SATA0_RX SATA0_RX A19 A20 Serial ATA channel 0 Receive Input differential pair I SATA AC coupled on Module SATA1_TX SATA1_TX B16 B17 Serial ATA channel 1 Transmit Output differential pair...

Page 22: ...PCI Express channel 3 Transmit Output differential pair O PCIE AC coupled on Module PCIE_RX3 PCIE_RX3 B58 B59 PCI Express channel 3 Receive Input differential pair I PCIE AC coupled off Module PCIE_TX...

Page 23: ...1 1 2 0 compliant USB6 USB6 A37 A36 USB differential data pairs for Port 5 I O 3 3VSB USB 1 1 2 0 compliant USB7 USB7 B37 B37 USB differential data pairs for Port 6 I O 3 3VSB USB 1 1 2 0 compliant U...

Page 24: ...se less than 100mA of SPI_POWER SPI_POWER shall only be used to power SPI devices on the Carrier O P 3 3VSB BIOS_DIS0 A34 Selection strap to determine the BIOS boot device I PU 10K 3 3VSB Carrier shal...

Page 25: ...3 3VSB PU 2k2 3 3VSB Source SEMA BMC I2C_DAT B34 General purpose I C port data I O line I O OD 3 3VSB PU 2k2 3 3VSB Source SEMA BMC 3 3 14 General Purpose I O GPIO Signal Pin Description I O PU PD Com...

Page 26: ...This signal can be used to hold off Module startup to allow carrier based FPGAs or other configurable devices time to be programmed I 3 3V PU 10k 3 3VSB Should have weak pull up SUS_STAT B18 Indicate...

Page 27: ...l See section 7 Electrical Specifications for allowable input range If VCC5_SBY is used all available VCC_5V_SBY pins on the connector s shall be used Only used for standby and suspend functions May b...

Page 28: ...device O 3 3V IDE_REQ D8 IDE Device DMA Request It is asserted by the IDE device to request a data transfer I 3 3V PD 5K6 IDE_ACK D10 IDE Device DMA Acknowledge O 3 3V IDE_CS1 D16 IDE Device Chip Sele...

Page 29: ...38 C44 PCI bus byte enable lines active low I O 3 3V PCI_DEVSEL C36 PCI bus Device Select active low I O 3 3V PU 5K1 3 3V PCI_FRAME D36 PCI bus Frame control line active low I O 3 3V PU 5K1 3 3V PCI_I...

Page 30: ...OT capable of 66 MHz operation If the Module is not capable of supporting 66 MHz PCI operation this input may be a no connect on the Module If the Module is capable of supporting 66 MHz PCI operation...

Page 31: ...vailable VCC_12V pins on the connector s shall be used P 8 5 20V GND C1 C2 C5 C8 C11 C14 C21 C31 C41 C51 C60 C70 C73 C76 C80 C84 C87 C90 C93 C96 C100 C103 C110 D1 D2 D5 D8 D11 D14 D21 D31 D41 D51 D60...

Page 32: ...26 Pinouts and Signal Descriptions This page intentionally left blank...

Page 33: ...ctors and pinouts LEDs and switches that are used on the module but are not included in the PICMG standard specification 4 1 Connector Switch and LED Locations CD AB FAN LED1 4 pin Fan 40 pin Debug co...

Page 34: ...28 Connector Pinouts on Module Express KL2 and the DB40 Debug Module For illustration purposes only Figure 4 Express KL2 and the DB40 Debug Module...

Page 35: ...ystem power 3 3V provide from COM module 13 BMC Program interface cont d OCD0B Include a jumper to connect OCD0A via 1K0 pull up to 3 3V_BMC 32 GND 12 PWRBTN 31 BIOS_DIS0 11 SYS_RESET 30 RST 10 CB_RES...

Page 36: ...ption Codes below LED2 Green Power Source 3Vcc S0 LED ON S3 S4 S5 LED OFF ECO mode LED OFF LED3 Red BMC output and same signal as WDT B27 on BtB connector Module power up LED OFF Watchdog counting Kee...

Page 37: ...nnector Pinouts on Module 31 4 4 Fan Connector Connector Type JVE 24W1125A 04M00 Pin Orientation 1 2 3 4 Pin Assignment Name Description 1 FAN_PWMOUT 2 FAN_TACHIN 3 Ground 4 5V Table 4 Fan Connector P...

Page 38: ...perform the following steps 1 Shut down the system 2 Press the BIOS Setup Defaults RESET Button continuously and boot up the system You can release the button when the BIOS prompt screen appears 3 The...

Page 39: ...xpress Switch Locations 4 6 1 PCI Express Configuration Switch The PCI Express Configuration Switch allows you to configure the PCI Express x16 lanes from the CPU as 1 PCIe x16 2 PCIe x8 or 1 PCIe x8...

Page 40: ...lsafe mode both BIOS chips on the module are configured as SPI1 Only one of the two is connected to the SPI bus at any given time In case of failure of the primary SPI1 BIOS the system will reboot and...

Page 41: ...Card on the Express BASE Reference Carrier to support bifurbication of the CPU s PEG interface PCIe x16 The card reroutes the PCIe x16 to two x8 and allows testing of two independent PCIe add on cards...

Page 42: ...36 Connector Pinouts on Module This page intentionally left blank...

Page 43: ...are stored in flash Power cycles counter Boot counter Counts the number of boot attempts Watchdog Timer Set Reset Disable Watchdog Timer Features auto reload at power up System Restart Cause Power los...

Page 44: ...N CURRENT Use Main Current Function Table 7 SEMA Onboard Voltage Monitor 5 1 2 Main Current The BMC of the Express KL2 implements a current monitor The current can be read by calling the SEMA function...

Page 45: ...ception Code Error Message 0 NOERROR 2 NO_SUSCLK 3 NO_SLP_S5 4 NO_SLP_S4 5 NO_SLP_S3 6 NO_CB_PWRGD 7 BIOS_FAIL 8 RESET_FAIL 9 RESETIN_FAIL 10 CRITICAL_TEMP 11 POWER_FAIL 12 VOLTAGE_FAIL 13 NO_SYS_GD 1...

Page 46: ...40 Smart Embedded Management Agent SEMA This page intentionally left blank...

Page 47: ...B DOS Compatibility Memory 6 2 Direct Memory Access Channels Channel Number Data Width System Resource 0 8 bits Generic 1 8 bits Generic 2 8 bits Generic 3 8 bits Generic 4 Reserved cascade channel 5...

Page 48: ...Controller 80h LPC eSPI or PCIe 84h 86h Reserved 88h Reserved 8Ch 8Eh Reserved 90h Alias to 80h 092 Reset Generator 94h 96h Aliases to 8xh 98h Alias to 88h 9Ch 9Eh Alias to 8xh A0h A1h Interrupt Cont...

Page 49: ...IRQ Note 1 12 PS 2 Mouse IRQ12 via SERIRQ PIRQ Note 1 13 GSPI UART I2C SDIO N A Note 1 14 Gpio PIRQ Note 1 15 Gpio PIRQ Note 1 Note 1 These IRQs can be used for PCI devices when onboard device is disa...

Page 50: ...on 00h 00h 00h N A Intel host Bridge 00h 02h 00h Internal Intel I G D 00h 08h 00h Internal Gaussian Mixture Model 00h 14h 00h Internal xHCI Controller 00h 16h 00h Internal Intel Management Engine Inte...

Page 51: ...7 PCIE Port 8 Int0 INTA 16 INTB 17 INTC 18 INTD 19 INTA 16 INTB 17 INTC 18 INTD 19 Int1 INTB 17 INTC 18 INTD 19 INTA 16 INTB 17 INTC 18 INTD 19 INTA 16 Int2 INTC 18 INTD 19 INTA 16 INTB 17 INTC 18 IN...

Page 52: ...46 System Resources This page intentionally left blank...

Page 53: ...n bold and the function of each setting is described in the right hand column of the respective table Main Advanced Security Boot Save Exit BIOS Information Processor Information PCH Information SPI C...

Page 54: ...y Display CPU Brand Name CPU Signature Info only Display CPU Signature CPU Speed Info only Display CPU Frequency Processor ID Info only Display CPU ID Stepping Info only Display CPU Stepping Number of...

Page 55: ...only Display SMC hardware Version Serial Number Read only Display SMC serial Number Manufacturing Date Read only Display SMC manufacturing date Last Repair Date Read only Display SMC last repair date...

Page 56: ...ture Options Description Runtime Statistics Info only Total Runtime Read only The returned value specifies the total time in minutes the system is running in S0 state Current Runtime Read only The ret...

Page 57: ...power failure the system will automatically power on when power is restored 7 2 5 7 System Management LVDS Backlight Feature Options Description LVDS Backlight Info only LVDS Backlight Bright 255 The...

Page 58: ...nly one thread per enabled core is enabled VT d Disabled Enabled Check to enable VT d function on MCH Intel VMX Virtualization Technology Disabled Enabled Enable Disable support for the Intel virtuali...

Page 59: ...Auto C2 C3 C6 C7 Auto Package C State limit DTS SMM Disabled Enabled Enable Disable CPU DTS ACPI T states Disabled Enabled Enable Disable ACPI 3 0 T States 7 3 2 Memory Feature Options Description Me...

Page 60: ...2400 2600 2667 2800 2933 3000 3200 3467 3733 4000 4133 Maximun Memory Frequency Selections in MHz Max TOLUD Dynamic 1 GB 1 25 GB 1 5 GB 1 75 GB 2 GB 2 25 GB 2 5 GB 2 75 GB 3 GB 3 25 GB Maximum Value...

Page 61: ...F3 Graphics device should be Primary PCIE Internal Graphics Auto Disabled Enable Keep IGD enabled based on the setup options Aperture Size 128MB 256MB 512MB 1024MB 2048MB 4096MB Select the Aperture S...

Page 62: ...e DDI port 2 function choose to Display Port or HDMI Primary IGFX Boot Display VBIOS Default Select the Video Device which will be activated during POS Select Secondary Display Disabled Select Seconda...

Page 63: ...erve Info only Port X Disabled Enabled Enable Disable SATA Port Hot Plug Disabled Enabled Designates this port as Hot Pluggable Configured as eSATA Info only Spin up Device Disabled Enabled If enabled...

Page 64: ...bled Disabled This is a workaround for OSes without XHCI hand off support The XHCI ownership change should be claimed by the XHCI OS driver USB Mass Storage Driver Support Enabled Disabled Enable Disa...

Page 65: ...MEBx Selection Screen Enabled Disabled OEMFLag Bit 2 Enable MEBx selection screen with 2 options Press 1 to enter ME Configuration Screens Press 2 to initiate a remote connection Note Network Access...

Page 66: ...Clocks 128 PCI Bus Clocks 160 PCI Bus Clocks 192 PCI Bus Clocks 224 PCI Bus Clocks 248 PCI Bus Clocks Value to be programmed into PCI Latency Timer Register PCI X Latency Timer 32 PCI Bus Clocks 64 P...

Page 67: ...Disabled Enable Override SW EQ settings PCI and PCIe PCI Express Configuration PCI Express Root Port X Feature Options Description PCI Express Root Port Disabled Enable Control the PCI Express Root P...

Page 68: ...Enabled Transmitter Half Swing Enable Disable Detect Non Compiance Disabled Enable Detect Non Compliance PCI Express Device If enabled it will take more time at POST time Detect Timeout 0 The number o...

Page 69: ...elect the scale used for the Slot Power Limit Value PEGX Physical Slot Number 1 Set the physical slot number attached to this Port The number has to be globally unique within the chassis Values 0 8191...

Page 70: ...o will current default Enabled Jitter Dwell Time 3000 PEG Gen3 Preset Search dwell time 0 65535 in usec Jitter Error Target 2 The margin search error target value 1 65535 VOC Dwell Time 10000 The VOC...

Page 71: ...IO 2F8h IRQ 4 Auto IO 2F8h IRQ 3 IO 3F8h IRQ 3 4 5 6 7 10 11 12 IO 2F8h IRQ 3 4 5 6 7 10 11 12 IO 3E8h IRQ 3 4 5 6 7 10 11 12 IO 2E8h IRQ 3 4 5 6 7 10 11 12 Standard Serial Port Mode IrDA Active pulse...

Page 72: ...tually exclusive with Smart connect Emulation AT ATX Emulation AT ATX Select Emulation AT or ATX function If this option set to Emulation AT BIOS will report no suspend functions to ACPI OS In windows...

Page 73: ...e VT UTF8 Combination Key Support for ANSI VT100 terminals Recorder Mode Disabled Enable With this mode enabled only text will be sent This is to capture Terminal data Resolution 100x31 Disabled Enabl...

Page 74: ...ons Description Security Device Support Enabled Disabled Enables or Disables BIOS support for security device When disabled OS wil not show Security Device TCG EFI protocol and INT1A interface will no...

Page 75: ...equired to launch active boot option Has no effect for BBS boot options Boot Option Priorities Info only 7 4 1 1 CSM Configuration Feature Options Description CSM Support Enabled Disable This option c...

Page 76: ...strator Password Enter password User Password Enter password Secure Boot Submenu Customizable Secure Boot settings System Mode Info only Secure Boot Info only Vender Keys Info only Attempt Secure Boot...

Page 77: ...changes Discard Changes and Reset 7 6 2 Save Options Feature Options Description Save Changes Save Changes done so far to any of the setup options Discard Changes Discard Changes done so far to any of...

Page 78: ...72 BIOS Setup This page intentionally left blank...

Page 79: ...by the Intel Platform Innovation Framework for EFI the Framework The Framework refers the following boot phases which may apply to various status code checkpoint descriptions Security SEC initial low...

Page 80: ...overy errors PEI 8 2 Standard Status Codes 8 2 1 SEC Phase Status Code Description 0x00 Not used Progress Codes 0x01 Power on Reset type detection soft hard 0x02 AP initialization before microcode loa...

Page 81: ...h Bridge initialization North Bridge module specific 0x19 Pre memory South Bridge initialization is started 0x1A Pre memory South Bridge initialization South Bridge module specific 0x1B Pre memory Sou...

Page 82: ...ge module specific 0x3F 0x4E OEM post memory initialization codes 0x4F DXE IPL is started PEI Error Codes 0x50 Memory initialization error Invalid memory type or incompatible memory speed 0x51 Memory...

Page 83: ...ocess started 0xF3 Recovery firmware image is found 0xF4 Recovery firmware image is loaded 0xF5 0xF7 Reserved for future AMI progress codes Recovery Error Codes 0xF8 Recovery PPI is not available 0xF9...

Page 84: ...ecific 0x6E North Bridge DXE initialization North Bridge module specific 0x6F North Bridge DXE initialization North Bridge module specific 0x70 South Bridge DXE initialization is started 0x71 South Br...

Page 85: ...xA3 IDE Enable 0xA4 SCSI initialization is started 0xA5 SCSI Reset 0xA6 SCSI Detect 0xA7 SCSI Enable 0xA8 Setup Verifying Password 0xA9 Start of Setup 0xAA Reserved for ASL see ASL Status Codes sectio...

Page 86: ...rror loading Boot Option LoadImage returned error 0xDA Boot Option is failed StartImage returned error 0xDB Flash update is failed 0xDC Reset protocol is not available 8 2 6 DXE Beep Codes of Beeps De...

Page 87: ...ansitioned into ACPI mode Interrupt controller is in PIC mode 0xAA System has transitioned into ACPI mode Interrupt controller is in APIC mode 8 3 OEM Reserved Checkpoint Ranges Status Code Descriptio...

Page 88: ...82 BIOS Checkpoints Beep Codes This page intentionally left blank...

Page 89: ...to board connector with 0 5mm for a stacking height of 5 mm This connector can be used with 5 mm through hole standoffs SMT type Tyco 3 6318491 6 Foxconn QT002206 4141 3H 220 pin board to board connec...

Page 90: ...with all COM Express modules 9 2 2 Heat Sinks A heat sink can be used as a thermal solution for a specific COM Express module and can have a fan or be fanless depending on the thermal requirements 9 2...

Page 91: ...xpress KL2 uses two screws to attach the heatsink to the COM Express module Step 4 Place the COM Express module and heatsink assembly onto the connectors on the carrier board as shown Then press down...

Page 92: ...86 Mechanical Information Step 6 If you are installing a heatsink with a fan plug the fan connector into the carrier board as shown...

Page 93: ...he choice of 5 mm or 8mm board to board connectors there is the choice of Top and Bottom mounting In Top mounting the threaded standoffs are on the carrier board and the thermal solution is equipped w...

Page 94: ...ffs are DIP type and through hole standoffs are SMT type Other types not listed are available upon request 5mm through hole standoff SMT type P N 33 72000 0050 5mm threaded standoff DIP type P N 33 72...

Page 95: ...ables To avoid electrical shock and or damage to equipment Keep equipment away from water or liquid sources Keep equipment away from high heat or high humidity Keep equipment properly ventilated do no...

Page 96: ...60 0200 Toll Free 1 800 966 5200 USA only Fax 1 408 360 0222 Email info adlinktech com ADLINK Technology China Co Ltd Address 300 Fang Chun Rd Zhangjiang Hi Tech Park Pudong New Area Shanghai 201203 C...

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