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ETX-EV133   

User’s Manual

Page  36

ACPI Suspend Type

S1 (POS)

 Power On suspend

All devices are powered up except for the clock synthesizer. The Host and PCI clocks are inac-
tive and PIIX4 provides control signals and 32-kHz Suspend Clock (SUSCLK) to allow for DRAM
refresh and to turn off the clock synthesizer. The only power consumed in the system is due to
DRAM Refresh and leakage current of the powered devices. When the system resumes from
POS, PIIX4 can optionally resume without resetting the system, can reset the processor only, or
can reset the entire system. When no reset is performed, PIIX4 only needs to wait for the clock
synthesizer and processor PLLs to lock before the system is resumed. This takes typically 20 ms.

S3 (STR) Suspend To RAM

Power is removed from most of the system components during STR, except the DRAM. Power is
supplied to Suspend Refresh logic in the Host Controller, and RTC and Suspend Well logic in
PIIX4. PIIX4 provides control signals and 32-kHz Suspend Clock (SUSCLK) to allow for DRAM
refresh and to turn off the clock synthesizer and other power planes.

PM Control By APM

When enabled, an Advanced power Management device will be activated to enhance the Max.
Power Saving mode and stop the CPU internal clock. If the Max. Power Saving is not enabled,
this will be preset to No.

Video Off Option

Controls what causes the display to be switched off

Suspend -> Off           Always On                All Mode -> Off

Video Off Method

This determines the manner in which the monitor is blanked.

V/H SYNC+Blank

cause the system to turn off the vertical and horizontal  synchronization

signals and writes blanks to the screen.

Blank Screen This option only writes blanks to the screen.

DPMSInitial display power management signaling.

Modem Use IRQ

Name the interrupt request (IRQ) assigned to the modem (if any) on your system. Activity of the
selected IRQ always awakens the system.

Soft-Off By PWRBTN

Summary of Contents for ETX-EV133

Page 1: ...ETX ETX EV133 User s Manual ver 1 2...

Page 2: ...mentation even if advised of the possibility of such damages This document contains proprietary information protected by copyright laws All rights are re served No part of this manual may be reproduce...

Page 3: ...Initials Change 1 0 9 6 2004 JC Initial release 1 1 10 12 2004 JC changed all reference to Audio Codec AL201A to VT1616 added shared FDD support updated SMB I2 C parapgraph added Appendix A Heatspread...

Page 4: ...3 6 1 Connector Location 13 6 2 Pin Out Compatibillity 13 6 3 X1 Connector PCI bus USB and Audio 14 6 4 X2 Connector ISA Bus 15 6 4 X3 Connector CRT LCD Video COM1 2 LPT1 FDD IrDA Mouse Keyboard 16 6...

Page 5: ...3 Standard CMOS Features 24 8 4 Advanced BIOS Features 27 8 5 Advanced Chipset Features 30 8 6 Integrated Peripherals 33 8 7 Power Management Setup 35 8 8 PnP PCI Configurations 38 8 9 PC Health Statu...

Page 6: ...ETX EV133 User s Manual Page 6...

Page 7: ...A s Eden ESP processor combined with VIAApollo PLE133T and VT82C686B chipsets The onboard SODIMM socket supports 144 pin SODIMM type memory modules that can accommodates up to 512MB non ECC SDRAM modu...

Page 8: ...AWARD 2 Mb Flash BIOS with ACPI and APM 1 2 power management with console redirection and CMOS backup in onboard EEPROM f Watchdog Timer 254 level timer generates RESET f Expansion 16 bit ISA and 32...

Page 9: ...ealtek 8139CL f Ethernet Interface 10 100 Mbps Wake on LAN supported 1 6 Mechanical and Environmental f Power Requirement 5V only 10 Watt typical VIA Eden 600 MHz with 256 MB SDRAM f Operating Tempera...

Page 10: ...ESP 400 600 800 CPU VIA Eden ESP 400 600 800 Northbridge VIA VT8601T Northbridge VIA VT8601T FSB 66 100 133 Audio USB 1 1 SDRAM Memory Controller AGP VGA Controller Keyboard Mouse FDD LPT1 COM1 COM2 C...

Page 11: ...Page 11 ETX EV133 User s Manual 4 Mechanical Dimensions X3 X4 X1 X2...

Page 12: ...l is asserted The watchdog function can be enabled or disabled by setting the control register at I O port 440h and 443h Status Action Enable Refresh the Watchdog Timer Write timeout value to address...

Page 13: ...r 2 6 This document includes description of pin outs signal descriptions and mechanical characteristics of the ETX formfactor An addtional document called ETX Design Guide is a general introduction to...

Page 14: ...AD11 40 MICIN 41 AD12 42 LINEIN_R 43 AD13 44 AVCC 45 AD14 46 LINEOUT_L 47 AD15 48 AGND 49 C BE1 50 LINEOUT_R Pin Signal Pin Signal 51 VCC 52 VCC 53 PAR 54 SERR 55 PERR 56 RESERVED 57 PME 58 USB2 59 L...

Page 15: ...23 LA18 24 IRQ14 25 LA19 26 IRQ15 27 LA20 28 IRQ12 1 29 LA21 30 IRQ11 31 LA22 32 IRQ10 33 LA23 34 IO16 35 GND 36 GND 37 SBHE 38 M16 39 SA0 40 OSC 41 SA1 42 BALE 43 SA2 44 TC 45 SA3 46 DACK2 2 47 SA4 4...

Page 16: ...DDO3 37 LCDDO0 38 LCDDO2 39 VCC 40 VCC 41 JILI_DAT 1 42 FLM 43 JILI_CLK 1 44 BLON 45 BIASON 46 PLPWR_EN 47 TV_COMP 1 48 TV_Y 1 49 TV_SYNC 1 50 TV_C 1 Pin Signal Pin Signal 51 LPT FLPY 52 RESERVED 53 V...

Page 17: ...43 SIDE_ACK 44 PIDE_INTRQ 45 SIORDY 46 PIDE_ACK 47 SIDE_IOR 48 PIORDY 49 VCC 50 VCC Pin Signal Pin Signal 51 SIDE_IOW 52 PIDE_IOR 53 SIDE_DRQ 54 PIDE_IOW 55 SIDE_D15 56 PIDE_DRQ 57 SIDE_D0 58 PIDE_D1...

Page 18: ...CI PnP IRQ IRQ6 Edge High FDC 2 IRQ7 Edge High LPT1 2 IRQ8_L Edge Low Real Time Clock 2 IRQ9 Edge Low PCI PnP IRQ IRQ10 Level Low PCI PnP IRQ IRQ11 Level Low PCI PnP IRQ USB 3 IRQ12 Edge High Mouse 2...

Page 19: ...A PIRQB PIRQC PIRQD Audio PIRQC LAN 8139CL PIRQD 7 4 Memory Map Address Size Description 00000000 0009FFFF 640K DOS Application Area 000A0000 000BFFFF 128K Video Buffer Area 000C0000 000DFFFF 1M Expan...

Page 20: ...m use 0080 1 byte Reserved Debug port 0081 008F 16 bytes DMA page registers 0090 0091 2 bytes Available for system use 0092 1 byte System Control 0093 009F 13 bytes Available for system use 00A0 00BF...

Page 21: ...s on the VT82C868B the I2 C compatible SMB bus It is advisable to always connect external carrier board I2 C devices to the I2 C pins and SMB devices to the SMB pins to stay compatible with other modu...

Page 22: ...The Main Menu will be displayed at this time CMOS SETUP UTILITY Copyright C 1984 2001 Award Software Standard CMOS Features Load Fail Safe Defaults Advanced BIOS Features Load Optimized Defaults Adva...

Page 23: ...for power management PnP PCI Configuration see paragraph 7 8 This entry appears if your system supports PnP PCI PC Health Status see paragraph 7 9 Use this menu to specify your settings for frequency...

Page 24: ...t On All but Keyboard Base Memory 640K Extended Memory 252928K Total Memory 253952K Move Enter Select PU PD Value F10 Save ESC Exit F1 General Help F5 Previous Values F6 Fail SAfe Defaults F7 Optimize...

Page 25: ...ve 720K 3 5 in3 1 2 inch double sided drive 1 44M 3 5 in3 1 2 inch double sided drive 2 88M 3 5 in3 1 2 inch double sided drive Video Select the type of primary video subsystem in your computer The BI...

Page 26: ...to Choose the access mode for this hard disk The following options are selectable only if the IDE Primary Master item is set to Manual Cylinder Min 0 Max 65535 Set the number of cylinders for this har...

Page 27: ...ctor protection If this function is enabled and someone attempt to write data into this area BIOS will show a warning message on screen and alarm beep 8 4 Advanced BIOS Features This section allows yo...

Page 28: ...atus Select power on state for NumLock The choice On Off Gate A20 Option Select if chipset or keyboard controller should control GateA20 Normal A pin in the keyboard controller controls GateA20 Fast L...

Page 29: ...s disabled the system will boot and you can enter Setup freely OS Select For DRAM 64MB Select the operating system that is running with greater than 64MB of RAM on the system The choice Non OS2 OS2 Co...

Page 30: ...es the number of CLKs for the completion of the first part of a burst transfer Thus the lower the cycle length the faster the transaction However some SDRAM cannot handle the lower cycle length and ma...

Page 31: ...ult Choice Enabled Disabled Fast R W Turn Around Display Feature This item allow you configure what type of the external display you are using The choices are CRT or LVDS Displays cannot be used concc...

Page 32: ...ws you to enable disable the PCI dynamic bursting function Choice Enabled Disabled PCI Master 0 WS Write When Enabled writes to the PCI bus are executed with zero wait states PCI Delay Transaction The...

Page 33: ...k boot sector protection If this function is enabled and someone attempt to write data into this area BIOS will show a warning message on screen and alarm beep 8 6 Integrated Peripherals OnChip IDE Ch...

Page 34: ...uncion Choice Half Full TX RX inverting enable This item allow you to enable the TX RX inverting which depends on different H W requirement This field is not recommended to change its default setting...

Page 35: ...Function Select Enabled only if your computer s operating system supports ACPI the Advanced Configu ration and Power Interface specification Power Management There are 4 selections for Power Manageme...

Page 36: ...d to Suspend Refresh logic in the Host Controller and RTC and Suspend Well logic in PIIX4 PIIX4 provides control signals and 32 kHz Suspend Clock SUSCLK to allow for DRAM refresh and to turn off the c...

Page 37: ...r Failure On After a power failure the system will automatically reboot as soon as power is re stored Off After a power failure the system will not reboot when power is restored The system needs to be...

Page 38: ...Defaults F7 Optimized Defaults This section describes configuring the PCI bus system PCI or Personal Computer Interconnect is a system which allows I O devices to operate at speeds nearing the speed...

Page 39: ...DMA channel as one of the follow ing types depending on the type of device using the DMA Legacy ISA Devices compliant with the original PC AT bus specification requiring a specific DMA channel PCI IS...

Page 40: ...lp F5 Previous Values F6 Fail SAfe Defaults F7 Optimized Defaults CPU Warning Temperature Brings up a submenu that lets you assign a temperature level that is not to be exceeded by the CPU If the CPU...

Page 41: ...keyboard interface 09h Reserved 0Ah 1 Disable PS 2 mouse interface optional 2 Auto detect ports for keyboard mouse followed by a port interface swap optional 3 Reset keyboard for Winbond 977 series S...

Page 42: ...information 4 Onboard clock generator initialization Disable respective clock resource to empty PCI DIMM slots 5 Early PCI initialization Enumerate PCI bus number Assign memory I O resource Search fo...

Page 43: ...Eh 1 Program MTRR of M1 CPU2 2 Initialize L2 cache for P6 class CPU program CPU with proper cacheable range 3 Initialize the APIC for P6 class CPU 4 On MP platform adjust the cacheable range to smalle...

Page 44: ...tem in Setup is set to AUTO 6Eh Reserved 6Fh 1 Initialize floppy controller 2 Set up floppy related fields in 40 hardware 70h Reserved 71h Reserved 72h Reserved 73h Initialize fixed disk controller 74...

Page 45: ...d 88h Reserved 89h Reserved 90h Reserved 91h Reserved 92h Reserved 93h Read HDD boot sector information for Trend Anti Virus code 94h 1 Enable L2 cache 2 Program boot up speed 3 Chipset final initiali...

Page 46: ...atible with any kind of ETX module not just the ETX EV133 It enables the second source model for ETX or upgrade path to a higher performance ETX module Any change in ETX board type does not requirre t...

Page 47: ...Page 47 ETX EV133 User s Manual Aluminum Plate 3 118 5 209 Heat Pad Aluminum Pad Thermal Paste HTS EV133 A 1 Heatspreader Dimensions...

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