ADLINK Technology DLAP-3200-CF Series, User Manual

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Resource Mapping 87
DLAP-3200-CF
Appendix B Resource Mapping
B.1 BIOS Mapping in SPI ROM
The chipset supports up to three SPI ROMs (SPI_CS0#,
SPI_CS1# and SPI_CS2#). The motherboard uses SPI flash
SPI_CS0# to select the SPI flash which stores ME firmware and
the system BIOS. The size of the SPI ROM is 16MB for H310, and
32MB for Q370 chipsets.
From a software standpoint, the serial peripheral interface (SPI)
resides in the memory mapped space. This function contains reg-
isters that allow for the setup and programming of devices that
reside on the SPI interface. The physical SPI ROM can be
accessed by putting an address into the flash address register.
The motherboard SPI ROM mapping is as below.
Region Size
Descriptor 4 KB
ME 8 MB - 4 KB
BIOS 8 MB