ADLINK Technology CoreModule 430, Reference Manual

Page: 31 / 56

Chapter 3 Hardware
CoreModule 430 Reference Manual 25
Notes: The shaded table cells denote power or ground. The * symbol indicates the signal is Active Low.
Ethernet Interface
The Ethernet solution originates from the Vortex 86SX/DX CPU and consists of both the Media Access
Controller (MAC) and the physical layer (PHY) combined into a single component solution. The Vortex Fast
Ethernet Control Unit is a 32-bit PCI controller that features enhanced scatter-gather bus mastering
capabilities, which enables the processor to perform high-speed data transfers over the internal PCI bus. The
bus master capabilities enable the component to process high-level commands and perform multiple
operations, thereby off-loading communication tasks from the CPU. The Ethernet interface offers the
following features:
•
Full duplex or half duplex support
•
Full duplex support at 10 Mbps or 100 Mbps
•
In full duplex mode, the Ethernet controller adheres to the IEEE 802.3x Flow Control specification.
•
In half duplex mode, performance is enhanced by a proprietary collision reduction mechanism.
•
IEEE 802.3 10/100BaseT compatible physical layer to wire transformer
•
Two on board LEDs support the speed and the link & activity status
•
IEEE 802.3u Auto-Negotiation support
•
Fast back-to-back transmission support with minimum interframe spacing (IFS).
•
IEEE 802.3x auto-negotiation support for speed and duplex operation
•
3 kB transmit and 3 kB receive FIFOs (helps prevent data underflow and overflow)
•
IEEE 802.3x 100BaseTX flow control support
•
On-board magnetics (Ethernet isolation transformer)
Table 3-11 describes the pin signals of the Ethernet interface, which uses a single-row, 8-pin header with
0.100" (2.54mm) pitch.
9 BATV+ Real time battery voltage (3.0V Max) input
10 MCLK Mouse Clock input
Table 3-11. Ethernet Interface Pin/Signal Descriptions (J2)
Pin # Signal Description
1 TX+ Analog Twisted Pair Ethernet Transmit Differential Pair – These pins transmit the
serial bit stream through the isolation transformer.
2 TX-
3 RX+ Analog Twisted Pair Ethernet Receive Differential Pair – These pins receive the
serial bit stream through the isolation transformer.
6 RX-
4 CT Center Tap – Connected through two 75 ohm resistors in series to center tap of
isolation transformer and then to ground through common 1k PF capacitor.
5 CT
7 CT Center Tap – Connected through two 75 ohm resistors in series to center tap of
isolation transformer and then to ground through common 1k PF capacitor.
8 CT
NOTE The magnetics (isolation transformer, U12) for the Ethernet connector is
included on the CoreModule 430.
Table 3-10. Utility Interface Pin/Signal Descriptions (J5) (Continued)