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Register Structure & Programming

29

If the count register is reloaded during counting, the new
count will be loaded on the next CLK pulse. The count will be
inhibited while the GATE input is low.

Mode 5

: Hardware Triggered Strobe.

The counter will start counting after the rising edge of the
trigger input and will go low for one clock period when the
terminal count is reached. The counter is re-triggerable. The
output will not go low until the full count after the rising edge
of any trigger.

The detailed description of the mode of 8254, please refers the
Intel Microsystem Components Handbook.

3.7 Programming in High Level Language

A high level programming library is supported in the software
package DLL1. In the DLL1, all the popular software platforms
are supported, they are :

1. MS-DOS* : C/C++ library for Borland C and Microsoft C

2. Windows 3.11 : 16-bit Dynamic Linking Library (DLL)

3. Win-95 : 32-bit Dynamic Linking Library (DLL)

4. Win-NT 4.0 : 32-bit Dynamic Linking Library (DLL)

*

C/C++ library for DOS is also included in “Manual & Software

Utility” CD, which is supplied with ACL-7130. Please refer to
section 2.11 of this manual for description of the installation of
the ACL-7130 software library.

Summary of Contents for ACL-7130

Page 1: ...ACL 7130 32 Channels Isolated Digital I O Card...

Page 2: ...e possibility of such damages This document contains proprietary information protected by copyright All rights are reserved No part of this manual may be reproduced by any mechanical electronic or oth...

Page 3: ...2 8 SETTING OF LOWER IRQ SIGNAL POLARITY JP4 14 2 9 SIGNAL CONNECTION 14 2 10 COUNTER SIGNALS CONNECTOR JP5 17 2 11 ACL 7130 SOFTWARE LIBRARY INSTALLATION 18 REGISTER STRUCTURE PROGRAMMING 19 3 1 I O...

Page 4: ...ii Introduction APPENDIX B DIGITAL I O SIGNAL CONNECTION 34 B 1 ISOLATED DIGITAL INPUT CHANNELS 34 B 2 ISOLATED DIGITAL OUTPUT CHANNELS 34 B 3 DIGITAL I O CHANNELS 35 PRODUCT WARRANTY SERVICE 37...

Page 5: ...tions Chapter 2 Installation describes how to install the ACL 7130 The layout of ACL 7130 is shown the DIP switch setting for base address and jumpers setting for interrupt trigger and trigger mode ar...

Page 6: ......

Page 7: ...nterrupt lines One is generated by the external digital signals and the other is generated from the 8254 timer The dual interrupt lines are very usable in industrial applications of watchdog and trigg...

Page 8: ...set of cascaded timers and one independent counter Dual interrupt channels one is for external interrupt and the other is for on board timer interrupt Use 37 pin D type female connector AT Bus and Co...

Page 9: ...IRQ 9 10 11 12 15 for internal timer interrupt Temperature 0 50 C operating Humidity 0 to 90 non condensing Power Consumption 5V 350mA Isolated Digital Output No of channels 16 channels Electronical c...

Page 10: ...ink Max 0 5V at 24mA Input logic high voltage Source Max 0 4V at 12mA Driving Capacity All inputs and outputs are TTL DTL compatible and outputs will drive 1 standard TTL load 74 series or 4 LSTTL 74L...

Page 11: ...re introduced so that you can configure it according to your applications The default setting of ACL 7130 is shown at the end of this chapter 2 1 What You Have In addition to this User s Manual the pa...

Page 12: ...e Shipping and handling may cause damage to your module Be sure there are no shipping and handing damages on the module before processing After opening the card module carton extract the system module...

Page 13: ...Installation 7 2 3 ACL 7130 s Layout CN1 N2 SW1 JP4 JP5 CLK0 GATE0 OUT0 OUT1 GND JP1 130 JP2 CN4 CN3 JP3 JP6 Figure 2 1 PCB Layout Note CN4 is for Rev A only JP6 is for Rev B only...

Page 14: ...The ACL 7130 requires 8 consecutive address locations in the I O address space The base address of the ACL 7130 is restricted by the following conditions 1 The base address must be within the range H...

Page 15: ...0 ON 0 ON 0 ON 0 OFF 1 210 217 ON 0 ON 0 ON 0 ON 0 OFF 1 ON 0 218 21F ON 0 ON 0 ON 0 ON 0 OFF 1 OFF 1 2F8 2FF ON 0 OFF 1 OFF 1 OFF 1 OFF 1 OFF 1 300 307 default OFF 1 ON 0 ON o ON 0 ON 0 ON 0 308 30F...

Page 16: ...ress as Hex 300 Base Address Hex 300 3 0 0 1 1 0 0 0 0 0 0 0 0 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 2 6 Interrupt Setting The ACL 7130 offers AT Bus interrupt levels IRQ3 IRQ15 also a dual interrupt lines ar...

Page 17: ...t digital I O signals can be used as interrupt trigger sources also the trigger mode is either fall edge or rising edge trigger Note Both lower and higher IRQ can be set simultaneously And two differe...

Page 18: ...1 or DI_0 Digital Input 0 or DI_1 Digital Input 1 The jumper JP4 is used for signal source selection DI_0 IDI_0 DI_1 IDI_1 JP3 Figure 2 5 1 Jumper JP3 setting The higher IRQ source JP6 can be set as e...

Page 19: ...umper JP4 Fall Edge JP4 Rise Edge Figure 2 6 Jumper JP4 setting 2 9 Signal Connection There are three DIO connector The pin assignment of the 37 pins D type connector CN3 which is an isolated DIO sign...

Page 20: ...DI_13 IDI_4 ID0_0 EOGND EOGND EOGND ID0_1 ID0_4 ID0_2 ID0_6 ID0_3 ID0_8 ID0_10 ID0_12 ID0_14 ID0_7 ID0_5 ID0_9 ID0_11 ID0_15 ID0_13 VDD Legend IDI_n Isolated digital input channel n IDO_n Isolated dig...

Page 21: ...Connector CN2 CN 1 Digital Signal Output DO 0 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 DO 0 DO 2 DO 4 DO 6 DO 8 DO 10 DO 12 DO 14 GND 5V DO 1 DO 3 DO 5 DO 7 DO 9 DO 11 DO 13 DO 15 GND 12V...

Page 22: ...figure 2 10 CLK0 OUT0 GATE0 Counter 0 COUT1 GATE1 Counter 1 2M Hz Clock COUT2 GATE1 Counter 2 8254 Chip U12 C G O C G C G O O JP5 1 2 3 4 5 6 CLK0 GATE0 OUT0 GATE1 OUT1 Pacer GND Figure 2 10 Pin Assig...

Page 23: ...e programming work 1 Turn your PC s power switch on 2 Put the ADLink s Manual Software Utility CD into the appropriate CD driver 3 Type the commands X indicates the CD ROM driver X CD Software Isa_Car...

Page 24: ......

Page 25: ...Table 3 1 shows the I O address of each register with respect to the base address Address Write Read Base 0 Isolated DO low byte Isolated DI low byte Base 1 Isolated DO high byte Isolated DI high byt...

Page 26: ...I_0 Base 3 DI_15 DI_14 DI_13 DI_12 DI_11 DI_10 DI_9 DI_8 IDI_N Isolated Digital Input CH N DI_N Digital Input CH N 3 3 Digital Output Register There are total 32 digital output channels on the ACL 713...

Page 27: ...ried out by using either assembly or high level language such as BASIC or C language The following gives examples to show how to use programming language to access a DAS card or any add on I O card Ge...

Page 28: ...ort instruction and the read input port instruction are shown In the examples the base address of the I O card is assumed as HEX 300 and the port of the register to be access is BASE 2 Assembly To wri...

Page 29: ...ould study the operation theorem and the relative data sheet to understand how to operate this card then use the low level programming to perform those functions Generally the DIO control can be easil...

Page 30: ...peration The digital output states are written as 1 single byte to the port at address BASE N N 0 1 2 3 Data is written to all 8 bits as a single byte For example In BASIC 05 BASE H300 06 VALUE1 H3F 0...

Page 31: ...s The most commonly uses for the 8254 in microprocessor based system are programmable baud rate generator event counter binary rate multiplier real time clock digital one shot motor control For more i...

Page 32: ...L0 OPERATION 0 0 COUNTER LATCH 0 1 READ LOAD LSB 1 0 READ LOAD MSB 1 1 READ LOAD LSB FIRST THEN MSB M2 M1 M0 Select Operating Mode Bit 3 Bit 2 Bit 1 M2 M1 M0 MODE 0 0 0 0 0 0 1 1 x 1 0 2 x 1 1 3 1 0 0...

Page 33: ...ng 2 Write 2nd byte starts the new count Mode 1 Programmable One Shot The output will go low on the count following the rising edge of the gate input The output will go high on the terminal count If a...

Page 34: ...ter is reloaded with the full count and the whole process is repeated If the count is odd and the output is high the first clock pulse after the count is loaded decrements the count by 1 Subsequent cl...

Page 35: ...e detailed description of the mode of 8254 please refers the Intel Microsystem Components Handbook 3 7 Programming in High Level Language A high level programming library is supported in the software...

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Page 37: ...r 0A0 0BF interrupt controller 2 0C0 0DF DMA controller 0F0 0FF Math coprocessor 100 1EF not usable 1F0 1F8 Fixed disk 200 207 Game I O 278 27F Parallel printer port 2 LPT2 2F8 2FF Serial Port 2 COM2...

Page 38: ...2K The connection between outside signal and ACL 7130 is shown below 1 2K Ohm Isolated Input 1N4001 ACL 7130 External Signal B 2 Isolated Digital Output Channels The connection of isolated digital ou...

Page 39: ...Please refer to section 1 3 for the detailed digital I O DIO signal specification and section 2 9 for the DIO connectors and section 3 2 for the registers format To program digital I O operation is fa...

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Page 41: ...g its specifications or if the serial number has been removed Seller does not assume any liability for consequential damages as a result from our product uses and in any event our liability shall not...

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