background image

SERIES IP521 INDUSTRIAL I/O PACK                                EIA/TIA-422B SERIAL COMMUNICATION MODULE
___________________________________________________________________________________________

- 3 -

 

64-Character FIFO Buffers - 

Both the transmit and receive

channels of each serial port provide 64-byte data buffering to
reduce CPU interactions and interrupts.  This allows the
external processor to handle more tasks within a given time.

 

Programmable Character Size -

 Each serial port is software

programmable for 5, 6, 7, or 8 bit character sizes.

 

Programmable Stop Bits -

 Each serial port allows 1, 1-1/2, or

2 stop-bits to be added to, or deleted from, the serial data
stream

.

 

Programmable Parity Generation & Detection

 - Even, Odd,

or No Parity generation and detection is supported

.

 

Line-Break Generation & Detection -

 provision for sending

and detecting the line break character is provided.

 

False Start Bit Detection - 

Prevents the receiver from

assembling false data characters due to low-going noise spikes
on the RxD input line.

 

Programmable Baud Rate -

 The internal baud rate generator

allows the 921.6K maximum baud rate to be divided by any
divisor between 1 and 2

(16-1)

, providing support for all standard

baud rates.

 

Interrupt Support -

 Individually controlled transmit empty,

receive ready, line status, data set, & flow control interrupts
may be generated.  Unique interrupts can be assigned to each
port.  Interrupts use a priority shifting scheme based on the last
interrupt serviced, preventing the continuous interrupts of one
port from blocking the interrupts of another port.

 

Socketed Termination and Bias Resistors 

- The network

termination and bias resistors are installed in sockets on the
board and may be easily inserted or removed where required.

 

Failsafe Receivers 

- The receivers employed in this model

include a fail-safe feature which guarantees a high output state
when the inputs are left open or floating.

 

Internal Diagnostic Capabilities

 - Loopback controls for

communication link fault isolation are included.  Break, parity,
overrun, and framing error simulation are also possible.

 

Compatible with Industry Standard UARTs 

- The UART of

this IP module is compatible with the industry standard
ST16C554/654, ST68C554/654, and TL16C544.  Additionally,
this device can operate in a 16C450 UART family software
compatible mode.  The transmit and receive channels are
double-buffered in this mode.  Hold and shift registers eliminate
the need for precise synchronization between the host CPU
and the serial data.

 

Software Flow Control

 - One or two sequential receive data

characters are compared to a programmed Xon or Xoff
character value.  Data transmission can be suspended or
resumed via software flow control.

 

Sleep Mode

 -The UART can be set via register control to a

special sleep mode to reduce power consumption when the
chip is not being used.

 

Extended Temperature Performance Option - 

Model IP521-

E units support operation from -40

°

C to +85

°

C.

INDUSTRIAL I/O PACK INTERFACE FEATURES

 

High density -

 Single-size, industry standard, IP module

footprint.  Four/five units mounted on a carrier board provide up
to 32/40 serial ports in a single system slot.

 

Local ID

 - Each IP module has its own 8-bit ID information

which is accessed via data transfers in the "ID Read" space.

 

8-bit I/O

 - Port register Read/Write is performed through 8-bit

data transfer cycles in the IP module I/O space.

 

High Speed

 - Access times for all data transfer cycles are

described in terms of "wait" states - 1 wait state is required for
reading/writing channel data, 2 wait states for interrupt select
cycles, and 0 wait states for reading the ID space (see the
Specifications section for detailed information).

SIGNAL INTERFACE PRODUCTS

(See Appendix for more information on compatible products)

This IP module will mate directly to any industry standard IP

carrier board (including Acromag’s AVME9630/9660 3U/6U non-
intelligent VMEbus carrier boards).  Additionally, PC/AT carrier
boards are also supported (see the Acromag Model APC8620
PCIbus carrier board).  A wide range of other Acromag IP modules
are available to serve your signal conditioning and interface needs.

Note:

 Since all connections to field signals are made through the

carrier board which passes them to the individual IP modules, you
should consult the documentation of your carrier board to ensure
compatibility with the following interface products.

Cables:

Model 5025-551-X (Shielded Cable), or Model 5025-550-X
(Non-Shielded Cable):  A Flat 50-pin cable with female
connectors at both ends for connecting AVME9630/9660,
APC8610, or APC8620 carrier boards, to Model 5025-552
termination panels.  The unshielded cable is recommended for
digital I/O, while the shielded cable is recommended for
optimum performance with precision analog I/O applications.
The “-X” suffix of the model number is used to indicate the
length in feet.

Termination Panels:

Model 5025-552: A DIN-rail mountable panel that provides 50
screw terminals for universal field I/O termination.  Connects to
Acromag AVME9630/9660, APC8610, or APC8620 carrier
boards, via flat 50-pin ribbon cable (Model 5025-550-X or 5025-
551-X).

Transition Module:

Model TRANS-GP:  This module repeats field I/O connections
of IP modules A through D for rear exit from a VMEbus card
cage.  It is available for use in card cages which provide rear exit
for I/O connections via transition modules (transition modules
can only be used in card cages specifically designed for them).
It is a double-height (6U), single-slot module with front panel
hardware adhering to the VMEbus mechanical dimensions,
except for shorter printed circuit board depth.  It connects to
Acromag Termination Panel 5025-552 from the rear of the card
cage, and to AVME9630/9660 boards within the card cage, via
flat 50-pin ribbon cable (cable Model 5025-550 or 5025-551).

Summary of Contents for IP521-64 Series

Page 1: ...ion Module USER S MANUAL ACROMAG INCORPORATED 30765 South Wixom Road P O BOX 437 Wixom MI 48393 7037 U S A Tel 248 624 1541 Fax 248 624 9234 Copyright 1998 Acromag Inc Printed in the USA Data and spec...

Page 2: ...L 5025 552 20 TRANSITION MODULE MODEL TRANS GP 20 DRAWINGS Page 4501 434 IP MECHANICAL ASSEMBLY 21 4501 713 IP521 BLOCK DIAGRAM 22 4501 714 RS422 RS485 INTERFACE DIAGRAM 23 4501 715 RESISTOR SOCKET LO...

Page 3: ...hen the chip is not being used Extended Temperature Performance Option Model IP521 E units support operation from 40 C to 85 C INDUSTRIAL I O PACK INTERFACE FEATURES High density Single size industry...

Page 4: ...e contents of the carton are damaged keep the carton and packing material for the agent s inspection For repairs to a product damaged in shipment refer to the Acromag Service Policy to obtain return i...

Page 5: ...tions without isolation to avoid noise pickup and ground loops caused by multiple ground connections The signal ground connection at the communication ports are common to the IP interface ground which...

Page 6: ...Register DLL Divisor Latch LSB DLM Divisor Latch MSB IER Interrupt Enable Register SCR Scratch Pad Interrupt Vector Register EFR Enhanced Feature Register XON 1 XON 1 Low Byte XON 2 XON 2 High Byte XO...

Page 7: ...ize programmed in the Line Control Register LCR bits 0 1 If less than 8 bits are transmitted then data is right justified to the LSB If parity is used then LCR bit 3 parity enable and LCR bit 4 type o...

Page 8: ...me as possible To better understand the asynchronous timing used by this device note that the receive data line RxD is monitored for a high to low transition start bit When the start bit is detected a...

Page 9: ...Status Register 5 010000 Received Xoff signal special character 6 100000 CTS RTS change of state Note that ISR bit 0 can be used to indicate whether an interrupt is pending bit 0 low when interrupt i...

Page 10: ...uffer Register RBR the Transmitter Holding Register THR or the Interrupt Enable Register IER A power up or system reset sets all LCR bits to 0 A detailed discussion of word length stop bits parity and...

Page 11: ...he received character does not have a valid stop bit stop bit following last data bit or parity bit detected as a zero space bit This bit is reset low when the CPU reads the contents of the LSR In FIF...

Page 12: ...IP module The EXAR UART maintains compatibility with the industry standard 16C554 654 and 68C554 654 UARTs and provides new features to enhance serial communication operation The new features provide...

Page 13: ...21 ID Space does not contain any variable e g unique calibration information ID Space bytes are addressed using only the odd addresses in a 64 byte block on the Big Endian VMEbus Even addresses are us...

Page 14: ...rial I O Pack Software Library diskette The functions provided are written in the C programming language and can be linked into your application Refer to the README TXT file in the root directory and...

Page 15: ...cted serial channel Further modem status interrupt generation is controlled manually in loopback mode by controlling the state of CTS internally Interrupt Generation This model provides individual con...

Page 16: ...0 baud i e 9600 14 7456MHz 16 96 3 Write 0BH to the Line Control Register LCR This first turns off the Divisor Latch Access bit to cause accesses to the Receiver and Transmit buffers and the Interrupt...

Page 17: ...ciations EIA TIA 422B BINARY 0 SPACE OFF BINARY 1 MARK ON SIGNAL A to B to Positive Differential Voltage Negative Differential Voltage Start and stop bits are used to synchronize the DCE to the asynch...

Page 18: ...nsmitter The line drivers convert the UART TTL levels to the EIA TIA 422B voltage levels The UART provides the necessary conversion from serial to parallel receive and parallel to serial transmit for...

Page 19: ...lass A product In a domestic environment this product may cause radio interference in which the user may be required to take adequate measures UART EXAR XR16C654 RS422 RS485 PORTS Channel Configuratio...

Page 20: ...0 3U 6U APC8610 or APC8620 non intelligent carrier boards field connectors only via a flat ribbon cable Model 5025 551 x The A D connectors on the carrier board connect the field I O signals to the P2...

Page 21: ...SERIES IP521 INDUSTRIAL I O PACK EIA TIA 422B SERIAL COMMUNICATION MODULE ___________________________________________________________________________________________ 21...

Page 22: ...BIAS RESISTOR RB SIPS ARE MOUNTED IN SOCKETS AND MAY BE REMOVED IF REQUIRED P O R T A B R RxD RxD TxD TxD R T R T R B 5V R RxD RxD PORTS B to G TxD R B T R B R TxD T 5V P O R T H ADDRESS BUS DATA BUS...

Page 23: ...TS ARE TRANSMITTING 2 ALL RS422 RS485 TRANSMITTING AND RECEIVING CHANNELS MAY HAVE TERMINATING RESISTORS RT AT BOTH ENDS OF THE NETWORK THE IP521 HAS THESE RESISTORS 120 OHM INSTALLED IN SOCKETS AND T...

Page 24: ...VIDED AS SHOWN 1 P2 A R25 A R25 B R25 C R25 D R24 D R26 A SIP R23 A R23 B R23 C R23 D R24 A R24 B R24 C VALUE 120 OHM 120 OHM 120 OHM 120 OHM 120 OHM 120 OHM 120 OHM 120 OHM 120 OHM 120 OHM 120 OHM 12...

Page 25: ...SERIES IP521 INDUSTRIAL I O PACK EIA TIA 422B SERIAL COMMUNICATION MODULE ___________________________________________________________________________________________ 25...

Page 26: ...SERIES IP521 INDUSTRIAL I O PACK EIA TIA 422B SERIAL COMMUNICATION MODULE ___________________________________________________________________________________________ 26...

Page 27: ...SERIES IP521 INDUSTRIAL I O PACK EIA TIA 422B SERIAL COMMUNICATION MODULE ___________________________________________________________________________________________ 27...

Page 28: ...SERIES IP521 INDUSTRIAL I O PACK EIA TIA 422B SERIAL COMMUNICATION MODULE ___________________________________________________________________________________________ 28...

Reviews: