AXM-VFX-EDK User’s Manual Mezzanine Board
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Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:[email protected] http://www.acromag.com
9
This Section provides the specific information necessary to program and
operate the board.
The generic memory space address map for the board is shown in Table
3.1. The actual bit mapping in the individual registers are detailed in the
register descriptions later in this manual. Note that the PCIBAR2 from the
base PMC module in memory space must be added to the addresses
shown to properly access the board registers. Register accesses as 32, 16,
and 8-bits in memory space are permitted.
Base
Addr+
D31
D16
D15
D00
Base
Addr+
0003
↓
7FFF
Reserved for base PMC Module
1
0000
↓
7FFC
8003
Board Status Register and Software Reset
2
8000
8007
29-0 EDK I/O Register
3
8004
800B
Direction Register
EDK Channels 29-0
3
8008
800F
15-0 Digital I/O Register
3
800C
8013
Direction Register
Digital Channels 15-0
3
8010
8017
Not Used
4
Interrupt Enable
Differential Ch. 15-8
8014
801B
Not Used
4
Interrupt Type
Differential Ch. 15-8
8018
801F
Not Used
4
Interrupt Polarity
Differential Ch. 15-8
801C
8023
Not Used
4
8020
8027
Not Used
4
8024
802B
Not Used
4
8028
802F
↓
1FFFFF
Reserved for base PMC Module
1
802C
↓
1FFFFC
3.0 PROGRAMMING
INFORMATION
AXM-VFX-EDK
MEMORY MAP
Table 3.1: Memory Map
1. This address space is not
defined for this module. This
space may be used on the
base PMC Module. Refer to
the base PMC module User’s
Manual for further information
2. These registers have bits
that are reserved for the base
PMC module. See the register
definition later in this manual
for further details.
3. The bits used in these
registers varies for each
model. Refer to the register
descriptions in the following
pages for specific module
mapping.
4. The board will return 0 for
all addresses that are "Not
Used".