AXM-VFX-EDK User’s Manual Mezzanine Board
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Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:[email protected] http://www.acromag.com
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This section contains information regarding the hardware of the board.
A description of the basic functionality of the circuitry used on the board is
also provided. Note that each section does not necessarily apply to every
model. Refer to table below to determine the appropriate sections.
MODEL
I/O Type
Interrupts
JTAG Support
AXM-VFX-EDK
30 LVTTL
8 Channels
Yes
The AXM-VFX-EDK has a total of 42 (30 General Purpose and 12
auxiliary) channels of LVTTL. These I/O provide a direct connection through
the mezzanine connector to the adjoining FPGA. There are no intermediate
buffers on the I/O. As such care must be taken to limit overshoot (to 3.6V)
and to prevent ESD, or the FPGA on the PMC base board may be
damaged.
The I/O on the AXM-VFX-EDK are mapped to simulate the various types
of I/O that can be found on the AXM-D series modules. Therefore the same
registers can be used to simulate the Field I/O on the AXM-VFX-EDK. The
30 general purpose I/O map to the 30 differential I/O on the AXM-D02, the
22 differential I/O on the AXM-D03, and 30 LVDS I/O on the AXM-D04. The
16 auxiliary I/O map to the 16 differential signal on the AXM-D03. Note that
regardless of which AXM-D module is being emulated, the AXM-VFX-EDK
I/O are all 3.3V LVTTL.
The AXM-VFX-EDK model has a front field I/O Xilinx JTAG header. It
readily connects to any compatible Xilinx programming system such as the
MULTIPro Tool® or Parallel Cable programming system. In general, the
JTAG interface pins connect only to the Xilinx FPGA. See the PMC base
board for further information. The JTAG interface is powered by 3.3V.
Eight Channels in each model can be configured to generate interrupts
for Change-Of-State (COS) and input level (polarity) match conditions. The
interrupt is released via a write to the corresponding bit of the Interrupt
Status/Clear register. The channels enabled for interrupt in the example
design are Differential Channels 8 to 15 on the LVTTL Channels 8-15 on the
AXM-EDK.
The AXM-VFX-EDK and AXM-D series of extension I/O modules are
attached to the PMC base board via a high speed 150 pin header. The
connector provides power to the extension board and multiple logic
connections to the base board. Note that any PMC base board with a re-
configurable FPGA will require the pin definitions provided in the EDK to
properly operate the AXM-VFX-EDK and AXM-D series boards.
4.0 THEORY OF
OPERATION
LVTTL DIRECT
INTERFACE
JTAG INTERFACE
INTERRUPT LOGIC
PMC BASE BOARD
CONNECTION