AP500/AP520/AP521 ACROPACK
USER
’S MANUAL
Acromag, Inc. Tel: 248-295-0310
- 19 - http://www.acromag.com
- 19 -
www.acromag.com
3.0 PROGRAMMING INFORMATION
This section provides an overview of the AP5XX module's registers as well as
specific information necessary to identify the model and its
geographical/carrier location information. Once the driver is loaded the
modules will be identified by the operating system as a standard serial port
so low-level programming is not required for normal operation in a
supported operating system.
More detailed register information can be found in Section 1.0 of the
Exar17v35x UART datasheets, referenced in
Section 1.6
.
For information on software available for use with the AP5XX modules, see
Section 1.5
.
3.1 PCI Configuration Registers
The PCIe bus is defined to address three distinct address spaces: I/O,
memory, and configuration space. The AcroPack module can be accessed
via the PCIe bus memory space and configuration spaces only.
The AcroPack configuration registers are initialized by system software at
power-up to configure the card. The AcroPack module is a Plug-and-Play
PCIe card. As a Plug-and-Play card the board’s base address and system
interrupt request are not selected via jumpers but are assigned by system
software upon power-up via the configuration registers. A PCIe bus
configuration access is used to access the AcroPack’s configuration registers.
When the computer is first powered-up, the computer’s system
configuration software scans the PCIe bus to determine what PCIe devices
are present. The software also determines the configuration requirements
of the PCIe card.
The system software accesses the configuration registers to determine how
many blocks of memory space the module requires. It then programs the
board’s configuration registers with the unique memory base address.
Since this board is not fixed in address space, its device driver must use the
mapping information stored in the board’s Configuration Space registers to
determine where the board is mapped in memory space.
The configuration registers are also used to indicate that the board requires
an interrupt request. The system software then programs the configuration
registers with the interrupt request for the board.
The PCIe specification requires software driven initialization and
configuration via the Configuration Address space. This board provides 512
bytes of configuration registers for this purpose. It contains the
configuration registers shown in the following table to facilitate
