Acer Aspire 7250, Serveice Manual, Page: 145 / 223

Troubleshooting
4-21
SEC_SETUP_CAR_OK SEC 7 Cache as RAM test
SEC_FORCE_MAX_RATIO* SEC 8 Tune CPU frequency ratio to
maximum level
SEC_GO_TO_SECSTARTUP SEC 9 Setup BIOS ROM cache
SEC_GO_TO_PEICORE SEC 0A Enter Boot Firmware
Volume
* 3rd party relate functions – Platform dependence.
Table 4-4. PEI Phase POST Code Table
Functionality Name (Include\
PostCode.h)
Phase
Post
Code
Description
PEI_SIO_INIT PEI 70 Super I/O Initialization
PEI_CPU_REG_INIT PEI 71 CPU Early Initialization
PEI_CPU_AP_INIT* PEI 72 Multi-processor Early Initial
PEI_CPU_HT_RESET* PEI 73 HyperTransport Initialization
PEI_PCIE_MMIO_INIT PEI 74 PCIE MMIO BAR Initialization
PEI_NB_REG_INIT PEI 75 North Bridge Early Initialization
PEI_SB_REG_INIT PEI 76 South Bridge Early
Initialization
PEI_PCIE_TRAINING* PEI 77 PCIE Training
PEI_TPM_INIT PEI 78 TPM Initialization
PEI_SMBUS_INIT PEI 79 SMBUS Early Initialization
PEI_PROGRAM_CLOCK_GEN PEI 7A Clock Generator Initialization
PEI_IGD_EARLY_INITIAL * PEI 7B Internal Graphic device early
Initialization
PEI_HECI_INIT* PEI 7C HECI Initialization
PEI_WATCHDOG_INIT* PEI 7D Watchdog timer Initialization
PEI_MEMORY_INIT PEI 7E Memory Initial for Normal boot.
PEI_MEMORY_INIT_FOR_CRISIS PEI 7F Memory Initial for Crisis
Recovery
PEI_MEMORY_INSTALL PEI 80 Simple Memory test
PEI_TXTPEI* PEI 81 TXT function early Initialization
PEI_SWITCH_STACK PEI 82 Start to use Memory
PEI_MEMORY_CALLBACK PEI 83 Set cache for physical memory
PEI_ENTER_RECOVERY_MODE PEI 84 Recovery device Initialization
Table 4-3. SEC Phase POST Code Table (Continued)
Functionality Name (Include\
PostCode.h)
Phase
Post
Code
Description