72
Chapter 1
6Eh
Display possible high address for UMB
recovery
70h
Display error messages
72h
Check for configuration errors
76h
Check for keyboard errors
7Ch
Set up hardware interrupt vectors
7Eh
Initialize coprocessor if present
80h
Disable onboard Super I/O ports and
IRQs
81h
Late POST device initialization
82h
Detect and install external RS232 ports
83h
Configure non-MCD IDE controllers
84h
Detect and install external parallel ports
85h
Initialize PC-compatible PnP ISA devices
86h
Re-initialize onboard I/O ports
87h
Configure motherboard configurable
devices (optional)
88h
Initialize BIOS Area
89h
Enable Non-Maskable Interrupts (NMIs)
8Ah
Initialize Extended BIOS Data Area
8Bh
Test and initialize PS/2 mouse
8Ch
Initialize floppy controller
8Fh
Determine number of ATA drives
(optional)
90h
Initialize hard-disk controllers
91h
Initialize local-bus hard-disk controllers
92h
Jump to UserPatch2
93h
Build MPTABLE for multi-processor
boards
95h
Install CD ROM for boot
96h
Clear huge ES segment register
97h
Fixup Multi Processor table
98h
1-2
Search for option ROMs. One long, two
short beeps on checksum failure.
99h
Check for SMART drive (optional)
9Ah
Shadow option ROMs
9Ch
Set up Power Management
9Dh
Initialize security engine (optional)
9Eh
Enable hardware interrupts
9Fh
Determine number of ATA and SCSI
drives
A0h
Set time of day
A2h
Check key lock
A4h
Initialize typematic rate
A8h
Erase F2 prompt
Code
Beeps
POST Routine Description
Acer Aspire 5910 SG.book Page 72 Tuesday, May 29, 2007 11:40 AM
Summary of Contents for Aspire 5910
Page 6: ...VI ...
Page 70: ...62 Chapter 1 ...
Page 89: ...Chapter 5 81 System Block Diagram System Block Diagram and Board Layout Chapter 5 ...
Page 110: ...102 Chapter 1 ...