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10101010110011010101011011010101001101010100110101101101101010100101
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1
Seagate
PC-3000 EXPRESS / UDMA / PORTABLE
F3 architecture
ACE Lab
Technical support: [email protected]
Phone: +7 863 201 50 06
42
ts.acelaboratory.com
Fig. 7.3
DT can be accessed 'By table' - from the list of scanned (during start or from the utility status dialog) DT or directly by
their identifiers – 'By ID'. In the latter case you have to select additionally the DT source: ROM or RAM.
The RAM tab provides access to the objects in the random-access memory of the controller.
Fig. 7.4
The following parts of address space are distinguished at that:
♦
Controller memory (general memory)
♦
DRAM (controller memory array)
♦
Servo Data (servo program address space)
♦
Servo Program (servo program address space)