ABB FSK II S +, Operating And Maintenance Manual

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6.2.5. Binary Signal Outputs
The used binary inputs can differ from project to project. Please refer to the valid wiring diagram.
Designation Description Observation
S1 CB Open This output is a copy of the “OPEN” position as determined by the sensor
In the event of an error, the CPU activates the watchdog alarm
S2 CB Close This output is a copy of the “CLOSE” position as determined by the sensor
In the event of an error, the CPU activates the watchdog alarm.
S3 Aux. CB Open This output is a copy of the “OPEN” position as determined by the sensor
S4 Aux. CB Close This output is a copy of the “CLOSE” position as determined by the sensor
S5 Unit Ready Standby indicator for:
•
Correct capacitor charge
•
Coil continuity
•
Valid and coherent position indication
• <10 faulty switching attempts
S6 WD Ready Self-monitoring signal of CPU – readiness
Closed when:
• WD in NOT READY = CPU is not working properly or MABS not supplied
Open when:
•
MABS is supplied AND CPU is working
S7 Undervoltage detection Display of the input Y7 with 100 ms response delay
Closed when:
• Under voltage is low (active) = voltage failure
Open when:
• Under voltage is high = voltage correct
Table 5 Signal Outputs