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56 XVR16*4th Generation Intel® Core™ i7 Based Rugged VME Single Board Computer
Publication No.
500-9300007876-000
Rev. C.0
5.3.8 XMC2 Connector (J25)
The following table lists the pin assignments of the onboard XMC2 connectors.
XMC2 is available on the XVR16 when the PMC2/XMC2 is chosen as an option for
the board (i.e. onboard hard drive is not chosen as an option). The XMC2 slot
provides a x4 lane wide PCI Express interface. Only if an XMC mezzanine board
is installed are the PCI express lanes muxed to the XMC slot, otherwise these
lanes are muxed to the PMC2 bridge.
The XMC2 is electrically and mechanically compliant to the specification
VITA 61.0 and IEEE 1386.1.
Figure 5-19 XMC Connector (J25)
A1
A19
F19
F1
Table 5-18 XMC2 Connector Pin Assignments (J25)
Pin A
B
C
D
E
F
1 TX0+
TX0-
+3.3 V
TX1+
TX1-
+5 V
2
GND
GND
TRST
GND
GND
XMCRSTIN
a
3
TX2+
TX2-
+3.3 V
TX3+
TX3-
+5 V
4
GND
GND
TCK
GND
GND
XMC2_RSTOUT
b
5 NC
NC
+3.3 V
NC
NC
+5 V
6
GND
GND
TMS
GND
GND
+12 V
7 NC
NC
+3.3 V
NC
NC
+5 V
8
GND
GND
TDI
GND
GND
-12 V
9 NC
NC
RPS
NC
NC
+5 V
10
GND
GND
TDO
GND
GND
GA0
11 RX0+
RX0N
MBIST
RX1+
RX1-
+5 V
12
GND
GND
GA1
GND
GND
XMC2PRESENT
13
RX2+
RX2-
+3.3 V AUX
RX3+
RX3-
+5 V
14
GND
GND
GA2
GND
GND
BMC_SDA
15
NC
NC
RPS
NC
NC
+5 V
16
GND
GND
MVMRO
GND
GND
BMC_SCL
17
NC
NC
RFU
NC
NC
RFU
18
GND
GND
RPS
GND
GND
RPS
19 CLK+
CLK-
RPS
WAKE
ROOT
RPS
a
Reset driven by XVR16
b
Reset driven by Mezzanine