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abaco systems V7768, Hardware Reference Manual

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Publication No: 500-9300007768-000 Rev. H.0

List of Tables  19

List of Tables 

Table 1-1 V7768 Connectors and Switches  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 1-2 Universe IID Mapping/SYSFAIL Generation - Switch (S6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 1-3 VME Strapping - Switch (S7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 1-4 VME System Controller - Switch (S10)   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 1-5 Battery Enable  - Switch (S11)   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 1-6 Password Clear/BIOS Boot Mode - Switch (S12)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 1-7 COM1 Configuration (RS232/RS422 Select) - Header (E13, E14, E17)   . . . . . . . . . . . . . . . . . . . . . . . . . .  . 25
Table 1-8 Mezzanine Connectors and Switches  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 1-9 Switch (S2) Settings   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 2-1 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 2-2 V7768/V7769 I/O Address Map  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 2-3 Interrupt Line Assignments   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 2-4 Interrupt Vector Table  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Table 2-5 PCI Device Interrupt Mapping by the BIOS  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Table 2-6 Supported Graphics Video Resolutions for Windows XP (Analog)   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Table 3-1 PCI Configuration Space Registers  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 3-2 TCSR1 Bit Mapping  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Table 3-3 Selectable Clock Source for Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 3-4 TCSR2 Bit Mapping  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 3-5 TMRLCR12 Bit Mapping   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 3-6 TMRLCR3 Bit Mapping   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 3-7 TMRLCR4 Bit Mapping   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 3-8 TMRCCR12 Bit Mapping  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 3-9 TMRCCR3 Bit Mapping  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 3-10 TMRCCR4 Bit Mapping  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 3-11 WCSR Bit Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 3-12 Selecting Timeout Value of the WDT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 3-13 Register Definitions Offset from BAR0  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table A-1 V7768 VME Connector Pinout (P1)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table A-2 V7768 VME Connector Pinout (P2)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table A-3 V7768 PCI-X PMC Site Connector Pinout (J11)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Table A-4 V7768 PCI-X PMC Site Connector Pinout  (J12)   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table A-5 V7768 PCI-X PMC Site Connector Pinout (J13)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Table A-6 Mezzanine PCI-X PMC Site Connector Pinout (J14 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table A-7 V7769 Backplane Connector Pinouts (P1 and P2)   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table A-8 Mezzanine PMC Site Connector Pinout (J11)   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table A-9 Mezzanine PCI-X PMC Site Connector Pinout  (J12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table A-10 Mezzanine PCI-X PMC Site Connector Pinout (J13 )   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Table A-11 Mezzanine PMC Site Connector Pinout (J21)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Table A-12 Mezzanine PCI-X PMC Site Connector Pinout  (J22)   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Table A-13 Mezzanine PCI-X PMC Site Connector Pinout (J23)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Table A-14 Mezzanine PCI-X PMC Site Connector Pinout (J24)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Table A-15 USB Connector Pinout (J29 and J30)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Table A-16 Gigabit Ethernet Connector Pinout (J18)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Summary of Contents for V7768

Page 1: ...7769 Intel Core Duo Processor VME Single Board Computer THE V7768 V7769 IS DESIGNED TO MEET THE EUROPEAN UNION EU RESTRICTIONS OF HAZARDOUS SUBSTANCE ROHS DIRECTIVE 2002 95 EC CURRENT REVISION Publication No 500 9300007768 000 Rev H 0 ...

Page 2: ...dated table on pg 22 H 0 November 2016 Reformatting Abaco Systems is registered with an approved Producer Compliance Scheme PCS and subject to suitable contractual arrangements being in place will ensure WEEE is processed in accordance with the requirements of the WEEE Directive Abaco Systems will evaluate requests to take back products purchased by our customers before August 13 2005 on a case by...

Page 3: ... numbers have a b subscript The prefix 0x shows a hexadecimal number following the C programming language convention Thus One dozen 12D 0x0C 1100b The multipliers k M and G have their conventional scientific and engineering meanings of x103 x106 and x109 respectively The only exception to this is in the description of the size of memory areas when k M and G mean x210 x220 and x230 respectively NOT...

Page 4: ... Intel Core 2 Duo Processor for Intel Centrino Duo Processor Technology Process Datasheet September 2007 Revision 004 Order Number 314078 004 Mobile Intel 945 Express Chipset Family November 2006 Order Number 309219 003 Intel I O Controller Hub 7 ICH 7 Family Datasheet January 2006 Order Number 307013 002 Intel 82571EB 82572EI Gigabit Ethernet Controller Product Datasheet December 2006 Revision 2 ...

Page 5: ...pecification 1386 from IEEE Standards Department Copyrights and Permissions 445 Hoes Lanes P O Box 1331 Piscataway NJ 08855 1331 PMC Specification 1386 1 from IEEE Standards Department Copyrights and Permissions 445 Hoes Lanes P O Box 1331 Piscataway NJ 08855 1331 USA ...

Page 6: ...vely cooled VME Eurocard form factor The V7768 is a full featured Intel CoreTM 2 Duo or Celeron M based SBC and the V7769 is a full featured Intel Core 2 Duo based SBC The V7768 V7769 utilize the advanced technology of Intel s 945GM chipset and the ICH7 M I O Controller Hub The 945GM chipset runs on a 533 MHz front side bus with the Celeron M processor and a 667 MHz front side bus with the Core 2 ...

Page 7: ...a Linux 2 6 x and VxWorks 6 x The standard desktop features of the V7768 V7769 are described in Chapter 2 Standard Features of this manual Embedded Features of the V7768 V7769 Remote booting out the front panel only Up to 8 GByte of bootable CompactFlash optional PCI X capable PMC site with VITA 35 P2 I O factory populated on V7768 and main board of V7769 VITA 1 1994 with byte swap 32 KByte NVRAM ...

Page 8: ... 945GM is a Memory Controller Hub MCH component providing the processor interface system memory interface DDR2 SDRAM and SVGA port Key features for the 945GM 533 MHz Processor system bus controller for the Celeron M 667 MHz Processor system bus controller for the Intel Core 2 Duo Up to 2 GByte DDR2 Memory via SODIMM High speed DMI architecture interface for communication with the ICH7 M I O contro...

Page 9: ...tel Core 2 Duo or Celeron M Processor 667MHz FSB Intel 945GM Express DDR2 Memory Up to 2 GByte SODIMM DMI x 4 Super I O L P C PEX8114 PCIe PCIX Bridge Tundra Universe IID VME VME USB 2 0 x 4 SATA x 2 FPGA NVRAM PCIX 133MHz 64 bit LAN2 PCIe x1 PCIe x4 LAN1 COM2 RS232 RS422 DDR2 USB Up to 8 GByte CompactFlash PATA PMC I O VITA 35 VME M e a z z a n i n e C o n n PCIe x8 P C I 33 M H z 32 b i t USB CO...

Page 10: ...10 V7768 V7769 Intel Core Duo Processor VME Single Board Computer Publication No 500 9300007768 000 Rev H 0 Figure 2 Illustration of V7768 ...

Page 11: ...am P1 P2 M e a z z a n i n e C o n n SAS 2 5 in SATA Drive Connector LSI1064 SAS SATA Controller PEX8114 PCIE PCIX Bridge PEX8518 PCIE Switch 2 x SAS SATA PCIE x4 SATA to IDE Converter Up to 4 GByte CompactFlash SATA IDE PCIE x4 PCIE x8 PCI X 64 100 PCI X PMC Site 1 PCI X PMC Site 2 Vita 35 ...

Page 12: ...12 V7768 V7769 Intel Core Duo Processor VME Single Board Computer Publication No 500 9300007768 000 Rev H 0 Figure 4 Illustration of V7769 ...

Page 13: ... power outlet Do Not Operate in an Explosive Atmosphere Do not operate the system in the presence of flammable gases or fumes Operation of any electrical system in such an environment constitutes a definite safety hazard Keep Away from Live Circuits Operating personnel must not remove product covers Component replacement and internal adjustments must be made by qualified maintenance personnel Do n...

Page 14: ...device may not cause harmful interference and 2 this device must accept any interference received including interference that may cause undesired operation FCC Class A NOTE This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when t...

Page 15: ... This Manual 15 Canadian Regulations The V7768 V7769 Class A digital apparatus comply with Canadian ICES 003 NOTE Any equipment tested and found compliant with FCC Part 15 for unintentional radiators or EN55022 previously CISPR 22 satisfies ICES 003 ...

Page 16: ...r 45 2 8 Video Graphics Adapter 46 3 Embedded PC RTOS Features 47 3 1 VME Bridge 47 3 1 1 Features 47 3 1 2 I2C SMBus Temperature Sensor 48 3 2 Embedded PCI Functions 48 3 3 Timers 49 3 3 1 Timer Control Status Register 1 TCSR1 49 3 3 2 Timer Control Status Register 2 TCSR2 50 3 3 3 Timer 1 2 Load Count Register TMRLCR12 51 3 3 4 Timer 3 Load Count Register TMRLCR3 51 3 3 5 Timer 4 Load Count Regi...

Page 17: ...V7769 Mezzanine PCI X PMC Site 2 Connectors 70 A 5 1 Mezzanine PCI X PMC Site 2 Connector and Pinout J21 70 A 5 2 Mezzanine PCI X PMC Site 2 Connector and Pinout J22 71 A 5 3 Mezzanine PCI X PMC Site 2 Connector and Pinout J23 72 A 5 4 Mezzanine PCI X PMC Site 2 Connector and Pinout J24 73 A 6 USB Connectors and Pinout J29 and J30 74 A 7 Gigabit Ethernet Connectors and Pinouts J15 and J18 75 A 8 V...

Page 18: ... Layout 58 Figure A 2 V7769 Connector Pinout 59 Figure A 3 VME Connectors P1 P2 60 Figure A 4 V7768 PCI X PMC Site Connector J11 62 Figure A 5 V7768 PCI X PMC Site Connector J12 63 Figure A 6 V7768 PCI X PMC Site Connector J13 64 Figure A 7 Mezzanine PCI X PMC Site Connector J14 65 Figure A 8 V7769 Backplane Connectors P1 and P2 66 Figure A 9 Mezzanine PCI X PMC Site Connector J11 67 Figure A 10 M...

Page 19: ...ble 3 6 TMRLCR3 Bit Mapping 51 Table 3 7 TMRLCR4 Bit Mapping 51 Table 3 8 TMRCCR12 Bit Mapping 52 Table 3 9 TMRCCR3 Bit Mapping 52 Table 3 10 TMRCCR4 Bit Mapping 52 Table 3 11 WCSR Bit Mapping 53 Table 3 12 Selecting Timeout Value of the WDT 54 Table 3 13 Register Definitions Offset from BAR0 55 Table A 1 V7768 VME Connector Pinout P1 60 Table A 2 V7768 VME Connector Pinout P2 61 Table A 3 V7768 P...

Page 20: ...Pinout 79 Table A 21 Mezzanine SAS Connector Pinout J28 80 Table B 1 AMI BIOS First Boot Menu 81 Table B 2 AMI BIOS Main Menu 82 Table B 3 AMI BIOS Advanced Menu 83 Table B 4 AMI BIOS PCI PnP Menu 84 Table B 5 AMI BIOS Boot Menu 85 Table B 6 AMI BIOS Security Menu 86 Table B 7 AMI BIOS Chipset Menu 87 Table B 8 AMI BIOS Exit Menu 88 Table C 1 Enable the Front Panel LAN for Remote Booting 89 Table ...

Page 21: ...ted that conductive material be inserted under the board to provide a conductive shunt Unused boards should be stored in the same protective boxes in which they were shipped 1 2 Hardware Setup The V7768 V7769 are factory populated with user specified options as part of the V7768 V7769 ordering information Contact Sales for ordering information For option upgrades or for any type of repairs contact...

Page 22: ...768 Board Layout Information Figure 1 1 V7768 Connector Locations CompactFlash M K USB USB P2 P1 P7 J34 SODIMM J11 J13 J12 J14 J30 J29 SVGA J28 COM1 J35 J38 GbE J33 GbE J32 J37 used for V7769 version E14 E13 E17 1 3 5 1 3 INDICATES PIN 1 ON 1 2 ON 1 2 ON 1 2 ON 1 2 ON 1 2 ON 1 2 S7 S8 S6 S12 S10 S11 ON 1 2 S9 Battery ...

Page 23: ...or J37 Board to Board connector for V7769 Header Function E13 COM1 Configuration E14 COM1 Configuration E17 COM1 RS422 Termination Switches Function S6 Mapping Sysfail generation S7 VME SYSRESET S8 Factory Configurable S9 Factory Configurable S10 System Controller S11 Battery enable S12 RTC Reset and Boot Pause Table 1 2 Universe IID Mapping SYSFAIL Generation Switch S6 Position State Function 1 4...

Page 24: ...sition 1 to Off 5 Power up the unit When power is reapplied to the unit the CMOS password will be cleared and the CMOS will be set to its defaults Table 1 4 VME System Controller Switch S10 Position State Function 1 4 On Force VME controller based on 2 3 state 1 4 Off Enable auto system controller 2 3 On Force system controller any slot 2 3 Off Force non system controller any slot Table 1 5 Batter...

Page 25: ...4 E13 E17 1 3 5 1 3 RS232 RS422 w Termination RS422 w o Termination COM1 Termination Headers E13 E14 E17 Table 1 7 COM1 Configuration RS232 RS422 Select Header E13 E14 E17 Select E13 Position E14 Position E17 Position RS232 In 3 5 4 6 Both Out RS422 w Termination Out 1 3 2 4 1 2 3 4 RS422 w o Termination Out 1 3 2 4 Both Out ...

Page 26: ...or VME Single Board Computer Publication No 500 9300007768 000 Rev H 0 1 2 2 Mezzanine Board Layout Information V7769 Figure 1 3 P1 P2 J11 J12 J21 J22 J23 J24 J13 J27 J28 ON 1 2 ON 1 2 S1 S2 P5 E6 E10 E9 Mezzanine Board Connector Locations ...

Page 27: ...ide of the heatsink is to be greater than 450 LFM 2 Insert the V7768 V7769 into a VME chassis system controller or peripheral slot While ensuring that the board is properly aligned and oriented in the supporting board guides slide the board smoothly forward against the mating connector Use the ejector handles to firmly seat the board Table 1 8 Mezzanine Connectors and Switches Connector Function P...

Page 28: ... installed the BIOS Setup program must be used to configure the drive types See Appendix B AMI BIOS Setup Utility on page 81 to properly configure the system 7 If a drive module is present install the operating system according to the manufacturer s instructions 1 3 1 BIOS Setup The V7768 V7769 has an onboard BIOS Setup program that controls many configuration options These options are saved in a ...

Page 29: ...Publication No 500 9300007768 000 Rev H 0 Installation and Setup 29 Figure 1 4 Installing the PMC Card on the V7768 V7769 ...

Page 30: ...30 V7768 V7769 Intel Core Duo Processor VME Single Board Computer Publication No 500 9300007768 000 Rev H 0 Figure 1 5 Back ofV7768 SBC Solder Side Backside Mounting for the PMC Card ...

Page 31: ...Publication No 500 9300007768 000 Rev H 0 Installation and Setup 31 Figure 1 6 Installation of Mezzanine Board onto the Main Board ...

Page 32: ... 0 Ports LAN1 10 100 1000 Mbit Ethernet connector for port 1 LAN2 10 100 1000 Mbit Ethernet connector for port 2 M K Mouse keyboard connector COM1 Serial Port RST Manual reset switch BPHT Status LEDs VGA Analog Video connector A L Activity and Link Status LEDs for rear GbE V7769 SATA Serial ATA Activity LED SAS1 SAS Lane 1 SAS2 SAS Lane 2 HB Heartbeat LED for SAS SATA controller The V7768 V7769 pr...

Page 33: ...ccurring Yellow LED Sysfail T VME failure Lights during VME SYSFAIL condition Red LED RST Switch ResetAllows the system to be reset from the front panel LAN1 and LAN2 LEDs ActivityIndicates the Ethernet is active Yellow LED Link10Base T LED Off 100Base TX Yellow LED or 1000Base T Green LED GP LED User Configurable general purpose LEDs Controlled by accessing I O port 0xA4B bits 7 4 The LEDs are tu...

Page 34: ...ill flash to indicate activity on the SATA drive Green LED SAS1SCSI Activity LED will flash to indicate activity on the first SAS Lane Green LED SAS2SCSI Activity LED will flash to indicate activity on the second SAS Lane Green LED HBHeartbeat Activity LED will flash to indicate activity on the secondary SCSI drive Green LED A fault is being indicated when any of the LEDs on the mezzanine board fo...

Page 35: ...y need to reference the product manual if it is not easily located See Figure 1 1 on page 22 2 Once the battery is located take a non conductive tool and gently pry on the edges of the battery to lift it from the socket For Battery Installation 1 Observe correct polarity 2 Press the new battery into the socket until the battery snaps into place Figure 1 9 Battery Removal Installation ...

Page 36: ... Visit our website at LINK www abaco com 2 2 Physical Memory The V7768 V7769 provide DDR2 Synchronous DRAM SDRAM as system memory Memory can be accessed as bytes words or longwords The SDRAM is accessible to the VME bus through the PCI to VME bridge and is addressable by the local processor The V7768 V7769 have a maximum memory configuration of 2GByte of DDR2 SDRAM memory This configuration calls ...

Page 37: ...FF for peripherals All standard PC I O peripherals such as serial and parallel ports hard and floppy drive controllers video system real time clock system timers and interrupt controllers are addressed in this region of I O space The BIOS initializes and configures all these registers properly adjusting these I O ports directly is not normally necessary The assigned and user available I O addresse...

Page 38: ...F 32 DMA Controller 2 0E0 16F 142 Reserved 170 177 8 ICH7 M Secondary Hard Disk Controller 178 1EF 120 User I O 1F0 1F7 8 ICH7 M Primary Hard Disk Controller 1F8 277 128 User I O 278 27F 8 I O Chip Reserved 280 2E7 104 Reserved 2E8 2EE 7 UART COM4 Serial I O 2EF 2F7 9 User I O 2F8 2FE 7 Super I O Chip COM2 Serial I O 16550 Compatible 2FF 36F 113 Reserved 370 377 8 Super I O Chip Secondary Floppy D...

Page 39: ...Q0 to IRQ7 at the Programmable Interrupt Controller PIC The IBM PC AT computer added eight more IRQx lines numbered IRQ8 to IRQ15 by cascading a second slave PIC into the original master PIC IRQ2 at the master PIC was committed as the cascade input from the slave PIC This architecture is represented in Figure 2 1 on page 44 To maintain backward compatibility with PC XT systems IBM chose to use the...

Page 40: ...er Page Fault 0F 15 IRQ7 Not Assigned Not Assigned 10 16 BIOS Video I O Coprocessor Error 11 17 System Configuration Check Same as Real Mode 12 18 Memory Size Check Same as Real Mode 13 19 XT Floppy Hard Drive Same as Real Mode 14 20 BIOS Comm I O Same as Real Mode 15 21 BIOS Cassette Tape I O Same as Real Mode 16 22 BIOS Keyboard I O Same as Real Mode 17 23 BIOS Printer I O Same as Real Mode 18 2...

Page 41: ...me as Real Mode 2F 47 DOS Print Spooler Driver Same as Real Mode 30 60 48 96 Reserved by DOS Same as Real Mode 61 66 97 102 User Available Same as Real Mode 67 6F 103 111 Reserved by DOS Same as Real Mode 70 112 IRQ8 Real Time Clock 71 113 IRQ9 Redirect to IRQ2 72 114 IRQ10 Not Assigned 73 115 IRQ11 Not Assigned 74 116 IRQ12 Mouse 75 117 IRQ13 Math Coprocessor 76 118 IRQ14 AT Hard Drive 77 119 IRQ...

Page 42: ... the request is cleared the device de asserts its INTx signal PCI defines one interrupt line for a single function device and up to four interrupt lines for a multifunction device or connector For a single function device only INTA may be used while the other three interrupt lines have no meaning Figure 2 1 on page 44 depicts the V7768 V7769 interrupt logic pertaining to FPGA timer operations and ...

Page 43: ...B C D REQ0 Ethernet Controller Intel 82571EB 0x8086 0x105E N A N A N A PCI Host Bridge GMCH 0x8086 0x27A0 N A N A N A VGA Controller GMCH 0x8086 0x27A2 N A N A N A Integrated Graphics GMCH 0x8086 0x27A6 N A N A N A PCI LPC Bridge ICH7 M 0x8086 0x27BD N A N A N A USB UHCI Controller ICH7 M 0x8086 0x27C8 0x27C9 0x27CA 0x27CB N A N A N A USB EHCI ICH7 M 0x8086 0x27CC N A N A N A SMBus Controller ICH7...

Page 44: ...ble via the VME backplane connectors The SATA interface is provided by the Intel I O Controller Hub chip ICH7 M It is routed out of the VME backplane P2 connector The SATA interface supports two channels known as the primary and secondary channels Selection of drive type along with detailed SATA selections are available in the CMOS Advanced BIOS Setup Menu CONNECTIONS MAPPED BY BIOS I O CONTROLLER...

Page 45: ...hone wiring and connectors The RJ45 connector is used with the 10Base T standard 10Base T has a maximum length of 100 meters 100Base TX The V7768 V7769 also support the 100Base TX Ethernet A network based on a 100Base TX standard uses unshielded twisted pair cables 100Base TX has a maximum length of 100 meters 1000Base T The V7768 V7769 support 1000Base T Ethernet using the Intel 82571 dual Ethern...

Page 46: ...gh resolution and extended video modes Table 2 6 shows the graphics video modes supported by the GMCH video controller for analog monitors Not all SVGA monitors support resolutions and refresh rates beyond 640 x 480 at 85 Hz Do not attempt to drive a monitor to a resolution or refresh rate beyond its capability Table 2 6 Supported Graphics Video Resolutions for Windows XP Analog Screen Resolution ...

Page 47: ...k transfers User configured interrupter User configured interrupt handler System Controller mode with programmable VME arbiter PRI SGL and RRS modes are supported VME BERR bus error timer software programmable Slave access from the VME to local RAM and mailbox registers Full featured programmable VME requester ROR RWD and BCAP modes are supported System Controller auto detection Complete VME maste...

Page 48: ... 114A The Subsystem ID field indicates the model number of the product 7768 The V7768 V7769 provide non volatile RAM NVRAM timers and a Watchdog Timer via the PCI bus FPGA These functions are required for embedded and real time applications The PCI configuration space of these embedded functions is shown in Table 3 1 Table 3 1 PCI Configuration Space Registers 31 16 15 0 Register Address Device ID...

Page 49: ... for application software to determine which timer is the cause of any interrupt 3 3 1 Timer Control Status Register 1 TCSR1 The timers are controlled and monitored via the Timer Control Status Register 1 TCSR1 located at offset 0x00 from the address in BAR2 The mapping of the bits in this register are shown in Table 3 2 Table 3 2 TCSR1 Bit Mapping Field Bits Read or Write Timer 1 Caused IRQ TCSR1...

Page 50: ...timer can be independently enabled by writing a 1 to the appropriate Timer x Enable field Similarly the generation of interrupts by each timer can be independently enabled by writing a 1 to the appropriate Timer x IRQ Enable field If an interrupt is generated by a timer the source of the interrupt may be determined by reading the Timer x Caused IRQ fields If the field is set to 1 then the respecti...

Page 51: ...lock regardless of whether the timer is enabled or disabled The value stored in this register is also automatically reloaded on terminal count or timeout of the timer 3 3 4 Timer 3 Load Count Register TMRLCR3 Timer 3 is 32 bits wide and obtains its load count from the Timer 3 Load Count Register TMRLCR3 located at offset 0x14 from the address in BAR2 The mapping of bits in this register is shown i...

Page 52: ...ending on the setting of the Read Latch Select bit in the Control Status Register TCSR2 See the TCSR2 register description for more information on these two modes 3 3 7 Timer 3 Current Count Register TMRCCR3 The current count of Timer 3 may be read via the Timer 3 Current Count Register TMRCCR3 located at offset 0x24 from the address in BAR2 The mapping of bits in this register is shown in Table 3...

Page 53: ...om Timer 3 to be cleared This can also be done by writing a 0 to the appropriate Timer x Caused IRQ field of the timer Control Status Register TCSR1 This register is write only and the data written is irrelevant 3 3 12 Timer 4 IRQ Clear T4IC The Timer 4 IRQ Clear T4IC register is used to clear an interrupt caused by Timer 4 Writing to this register located at offset 0x3C from the address in BAR2 c...

Page 54: ...tchdog Timer within the selected timeout period to prevent a reset or SERR from being generated The Watchdog Timer is refreshed by performing a write to the WDT Keepalive register WKPA The data written is irrelevant 3 4 2 WDT Keepalive Register WKPA When enabled the Watchdog Timer is prevented from resetting the system by writing to the WDT Keepalive Register WKPA located at offset 0x0C from the a...

Page 55: ...iary BERR Logic Enable bit 1 Aux BERR Enabled 0 Aux BERR Disabled BTO 3 Bus Error Timer Enabled 1 Enable 0 Disabled BTOV 1 0 5 4 Timeout Value 00 16 s 01 64 s 10 256 s 11 1 00 ms BERRI 6 BERR Interrupt Enable 1 Interrupt Enabled 0 Interrupt Disabled BERRST 7 BERR Status Read Clear bit R WC 1 Clear BERR status 0 Do nothing SFENA 8 Enables generation of VME SYSFAIL upon WDT timeout 1 Enable SYSFAIL ...

Page 56: ...ash Disk resides on the V7768 as the secondary IDE bus master device the secondary IDE bus slave device is not assignable 3 8 Remote Ethernet Booting The V7768 V7769 is capable of booting from a server using Gigabit Ethernet over a network utilizing the Boot ROM BIOS The BIOS gives you the ability to remotely boot the V7768 V7769 using a PXE network protocol The Ethernet must be connected through ...

Page 57: ...ts The V7768 V7769 have several connectors for their I O ports Wherever possible the V7768 V7769 use connectors and pinouts typical for any desktop PC This ensures maximum compatibility with a variety of systems Figure A 1 on page 58 shows the layout of the connectors on the V7768 ...

Page 58: ...000 Rev H 0 Figure A 1 V7768 Connector Layout CompactFlash M K USB USB P2 P1 P7 J34 SODIMM J11 J13 J12 J14 J30 J29 SVGA J28 COM1 J35 J38 GbE J33 GbE J32 J37 used for V7769 version E14 E13 E17 1 3 5 1 3 INDICATES PIN 1 ON 1 2 ON 1 2 ON 1 2 ON 1 2 ON 1 2 ON 1 2 S7 S8 S6 S12 S10 S11 ON 1 2 S9 Battery ...

Page 59: ...Publication No 500 9300007768 000 Rev H 0 Connector Pinouts 59 Figure A 2 V7769 Connector Pinout P1 P2 J11 J12 J21 J22 J23 J24 J13 J27 J28 ON 1 2 ON 1 2 S1 S2 P5 E6 E10 E9 ...

Page 60: ...12 N C N C 6 D05 BG1IN D13 N C GND 7 D06 BG1OUT D14 N C N C 8 D07 BG2IN D15 N C GND 9 GND BG2OUT GND VME_GA 5 N C 10 SYSCLK BG3IN SYSFAIL VME_GA 0 GND 11 GND BG3OUT BERR VME_GA 1 N C 12 DS1 BR0 SYSRESET N C GND 13 DS0 BR1 LWORD VME_GA 2 N C 14 WRITE BR2 AM5 N C GND 15 GND BR3 A23 VME_GA 3 N C 16 DTACK AM0 A22 N C GND 17 GND AM1 A21 VME_GA 4 N C 18 AS AM2 A20 N C GND 19 GND AM3 A19 N C N C 20 IACK ...

Page 61: ...NN 16 CONN 17 12 USB_OC3 GND GND CONN 18 GND 13 GND 5 V SATA1_RXN CONN 19 CONN 20 14 USB_P2N D16 SATA1_RXP CONN 21 GND 15 USB_P2P D17 GND CONN 22 CONN 23 16 USB_OC2 D18 SATA1_TXN CONN 24 GND 17 GND D19 SATA1_TXP CONN 25 CONN 26 18 5 V D20 GND CONN 27 GND 19 12 V D21 GND CONN 28 CONN 29 20 GND D22 SATA2_RXN CONN 30 GND 21 N C D23 SATA2_RXP CONN 31 CONN 32 22 N C GND GND CONN 33 GND 23 GND D24 SATA2...

Page 62: ...inout J11 PMC Connector J11 PMC Connector J11 Left Side Right Side Left Side Right Side Pin Name Pin Name Pin Name Pin Name 1 JTAG_TCK_2 2 VCC_ 12 33 FRAME 34 GND 3 GND 4 INTA 35 GND 36 RDY 5 INTB 6 INTC 37 DEVSEL 38 VCC_5 0 7 BMODE1 8 VCC_5 0 39 PCIXCAP 40 LOCK 9 INTD 10 N C 41 SDONE 42 PMC_SB0 11 GND 12 N C 43 PAR 44 GND 13 CLK 14 GND 45 VCC_3 3 46 AD 15 15 GND 16 GNT0 47 AD 12 48 AD 11 17 REQ0 ...

Page 63: ... 34 N C 3 JTAG_TMS_2 4 JTAG_TDO 35 TRDY 36 VCC_3 3 5 JTAG_TDI 6 GND 37 GND 38 STOP 7 GND 8 N C 39 PERR 40 GND 9 N C 10 N C 41 VCC_3 3 42 SERR 11 BMODE2 12 VCC_3 3 43 CBE 1 44 GND 13 PCIB_RESET 14 BMODE3 45 AD 14 46 AD 13 15 VCC_3 3 16 BMODE4 47 M66EN 48 AD 10 17 N C 18 GND 49 AD 8 50 VCC_3 3 19 AD 30 20 AD 29 51 AD 7 52 N C 21 GND 22 AD 26 53 VCC_3 3 54 N C 23 AD 24 24 VCC_3 3 55 N C 56 GND 25 PMC...

Page 64: ...Pin Name 1 N C 2 GND 33 GND 34 AD 48 3 GND 4 CBE 7 35 AD 47 36 AD 46 5 CBE 6 6 CBE 5 37 AD 45 38 GND 7 CBE 4 8 GND 39 VCC_3 3 40 AD 44 9 VCC_3 3 10 PAR64 41 AD 43 42 AD 42 11 AD 63 12 AD 62 43 AD 41 44 GND 13 AD 61 14 GND 45 GND 46 AD 40 15 GND 16 AD 60 47 AD 39 48 AD 38 17 AD 59 18 AD 58 49 AD 37 50 GND 19 AD 57 20 GND 51 GND 52 AD 36 21 VCC_3 3 22 AD 56 53 AD 35 54 AD 34 23 AD 55 24 AD 54 55 AD ...

Page 65: ... CONN 4 35 CONN 35 36 CONN 36 5 CONN 5 6 CONN 6 37 CONN 37 38 CONN 38 7 CONN 7 8 CONN 8 39 CONN 39 40 CONN 40 9 CONN 9 10 CONN 10 41 CONN 41 42 CONN 42 11 CONN 11 12 CONN 12 43 CONN 43 44 CONN 44 13 CONN 13 14 CONN 14 45 CONN 45 46 CONN 46 15 CONN 15 16 CONN 16 47 N C 48 N C 17 CONN 17 18 CONN 18 49 N C 50 N C 19 CONN 19 20 CONN 20 51 N C 52 N C 21 CONN 21 22 CONN 22 53 N C 54 N C 23 CONN 23 24 CO...

Page 66: ... 7 N C BG1OUT N C N C N C N C 8 N C BG2IN N C N C N C N C 9 GND BG2OUT GND N C N C N C 10 N C BG3IN N C N C N C N C 11 GND BG3OUT N C N C N C N C 12 N C N C N C N C GND N C 13 N C N C N C N C 5 V N C 14 N C N C N C N C N C N C 15 GND N C N C N C N C N C 16 N C N C N C N C N C N C 17 GND N C N C N C N C N C 18 N C N C N C N C N C N C 19 GND N C N C N C N C N C 20 N C GND N C N C N C N C 21 IACKIN N...

Page 67: ...ctor J11 PMC Connector J11 Left Side Right Side Left Side Right Side Pin Name Pin Name Pin Name Pin Name 1 JTAG_TCK_2 2 VCC_ 12 33 FRAME 34 GND 3 GND 4 INTA 35 GND 36 RDY 5 INTB 6 INTC 37 DEVSEL 38 VCC_5 0 7 BMODE1 8 VCC_5 0 39 PCIXCAP 40 LOCK 9 INTD 10 N C 41 SDONE 42 PMC_SB0 11 GND 12 N C 43 PAR 44 GND 13 CLK 14 GND 45 VCC_3 3 46 AD 15 15 GND 16 GNT0 47 AD 12 48 AD 11 17 REQ0 18 VCC_5 0 49 AD 9 ...

Page 68: ... 1 VCC_12 0 2 JTAG_TRST 33 GND 34 N C 3 JTAG_TMS_2 4 JTAG_TDO 35 TRDY 36 VCC_3 3 5 JTAG_TDI 6 GND 37 GND 38 STOP 7 GND 8 N C 39 PERR 40 GND 9 N C 10 N C 41 VCC_3 3 42 SERR 11 BMODE2 12 VCC_3 3 43 CBE 1 44 GND 13 PCIB_RESET 14 BMODE3 45 AD 14 46 AD 13 15 VCC_3 3 16 BMODE4 47 M66EN 48 AD 10 17 N C 18 GND 49 AD 8 50 VCC_3 3 19 AD 30 20 AD 29 51 AD 7 52 N C 21 GND 22 AD 26 53 VCC_3 3 54 N C 23 AD 24 2...

Page 69: ...2 GND 33 GND 34 AD 48 3 GND 4 CBE 7 35 AD 47 36 AD 46 5 CBE 6 6 CBE 5 37 AD 45 38 GND 7 CBE 4 8 GND 39 VCC_3 3 40 AD 44 9 VCC_3 3 10 PAR64 41 AD 43 42 AD 42 11 AD 63 12 AD 62 43 AD 41 44 GND 13 AD 61 14 GND 45 GND 46 AD 40 15 GND 16 AD 60 47 AD 39 48 AD 38 17 AD 59 18 AD 58 49 AD 37 50 GND 19 AD 57 20 GND 51 GND 52 AD 36 21 VCC_3 3 22 AD 56 53 AD 35 54 AD 34 23 AD 55 24 AD 54 55 AD 33 56 GND 25 AD...

Page 70: ...tor Pinout J21 PMC Connector J21 PMC Connector J21 Left Side Right Side Left Side Right Side Pin Name Pin Name Pin Name Pin Name 1 JTAG_TCK_2 2 VCC_ 12 33 FRAME 34 GND 3 GND 4 INTA 35 GND 36 RDY 5 INTB 6 INTC 37 DEVSEL 38 VCC_5 0 7 BMODE1 8 VCC_5 0 39 PCIXCAP 40 LOCK 9 INTD 10 N C 41 SDONE 42 PMC_SB0 11 GND 12 N C 43 PAR 44 GND 13 CLK 14 GND 45 VCC_3 3 46 AD 15 15 GND 16 GNT0 47 AD 12 48 AD 11 17 ...

Page 71: ...T 33 GND 34 N C 3 JTAG_TMS_2 4 JTAG_TDO 35 TRDY 36 VCC_3 3 5 JTAG_TDI 6 GND 37 GND 38 STOP 7 GND 8 N C 39 PERR 40 GND 9 N C 10 N C 41 VCC_3 3 42 SERR 11 BMODE2 12 VCC_3 3 43 CBE 1 44 GND 13 PCIB_RESET 14 BMODE3 45 AD 14 46 AD 13 15 VCC_3 3 16 BMODE4 47 M66EN 48 AD 10 17 N C 18 GND 49 AD 8 50 VCC_3 3 19 AD 30 20 AD 29 51 AD 7 52 N C 21 GND 22 AD 26 53 VCC_3 3 54 N C 23 AD 24 24 VCC_3 3 55 N C 56 GN...

Page 72: ...in Name Pin Name 1 N C 2 GND 33 GND 34 AD 48 3 GND 4 CBE 7 35 AD 47 36 AD 46 5 CBE 6 6 CBE 5 37 AD 45 38 GND 7 CBE 4 8 GND 39 VCC_3 3 40 AD 44 9 VCC_3 3 10 PAR64 41 AD 43 42 AD 42 11 AD 63 12 AD 62 43 AD 41 44 GND 13 AD 61 14 GND 45 GND 46 AD 40 15 GND 16 AD 60 47 AD 39 48 AD 38 17 AD 59 18 AD 58 49 AD 37 50 GND 19 AD 57 20 GND 51 GND 52 AD 36 21 VCC_3 3 22 AD 56 53 AD 35 54 AD 34 23 AD 55 24 AD 5...

Page 73: ... 4 CONN 4 35 CONN 35 36 CONN 36 5 CONN 5 6 CONN 6 37 CONN 37 38 CONN 38 7 CONN 7 8 CONN 8 39 CONN 39 40 CONN 40 9 CONN 9 10 CONN 10 41 CONN 41 42 CONN 42 11 CONN 11 12 CONN 12 43 CONN 43 44 CONN 44 13 CONN 13 14 CONN 14 45 CONN 45 46 CONN 46 15 CONN 15 16 CONN 16 47 N C 48 N C 17 CONN 17 18 CONN 18 49 N C 50 N C 19 CONN 19 20 CONN 20 51 N C 52 N C 21 CONN 21 22 CONN 22 53 N C 54 N C 23 CONN 23 24 ...

Page 74: ...d J30 The two USB ports are industry standard 4 position shielded connectors Figure A 16 shows a representation of the connectors and Table A 15 shows the pinout same for each Figure A 16 USB Connector J29 and J30 Table A 15 USB Connector Pinout J29 and J30 Pin Signal Function 1 USB_VCC USB Power 2 USB USB Data 3 USB USB Data 4 USBG USB Ground ...

Page 75: ...wn in Figure A 17 and Table A 16 Figure A 17 Gigabit Ethernet Connector J18 Table A 16 Gigabit Ethernet Connector Pinout J18 Pin Signal Function 1 TD Transmit Data 2 TD Transmit Data 3 RD Receive Data 4 TX_CT_OUT Transmit Center Tap Out 5 TX_CT_OUT Transmit Center Tap Out 6 RD Receive Data 7 RX_CT_OUT Receive Center Tap Out 8 RX_CT_OUT Receive Center Tap Out Connector Opening Top View Pin 1 ...

Page 76: ...ensity DB15 SVGA connector Figure A 18 illustrates the pinout and Table A 17 gives a description Figure A 18 SVGA 5 1 10 6 15 11 SVGA Connector J28 Table A 17 SVGA Connector Pinout J28 Pin Signal 1 VGA_Video1_Red 2 VGA_Video1_Green 3 VGA_Video1_Blue 4 N C 5 GND 6 GND 7 GND 8 GND 9 VCC_5 0 10 GND 11 N C 12 VGA_DDC_Data 13 VGA_HSYNC 14 VGA_VSYNC 15 VGA_DDC_CLK N C indicates No Connection ...

Page 77: ... J35 COM 1 serial port connector is a standard RJ45 connector as shown in Figure A 19 and its pinout in Table A 18 Figure A 19 Serial Connector J35 Table A 18 Serial Connector Pinout J35 Pin RS232 Signal RS422 Signal 1 DCD RXD 2 RTS RTS 3 GND TXD 4 TXD TXD 5 RXD RXD 6 GND GND 7 CTS CTS 8 DTR DTR ...

Page 78: ...es a Y splitter cable to separate the mouse and keyboard signals The Y splitter cable is shown in Figure A 21 on page 79 the pinout is shown in Table A 19 Figure A 20 1 2 3 4 5 6 Mouse Keyboard Connector J38 Table A 19 Mouse Keyboard Connector Pinout J38 Pin Direction Function 1 In Out Mouse Data In Out Keyboard Data 3 Ground 4 5 V 5 Out Mouse Clock 6 Out Keyboard Clock Shield Chassis Ground An ad...

Page 79: ...ble This may not work with some keyboard and mouse devices We recommend that you contact Customer Service for more information Table A 20 Mouse Keyboard Splitter Cable Pinout Keyboard Mouse Pin Direction Function Pin Direction Function 1 In Out Keyboard Data 1 In Out Mouse Data 2 Unused 2 Unused 3 Ground 3 Ground 4 5 V 4 5 V 5 Out Keyboard Clock 5 Out Mouse Clock 6 Unused 6 Unused Shield Chassis G...

Page 80: ... 9300007768 000 Rev H 0 A 11 V7769 Mezzanine SAS Connector and Pinout J28 Figure A 22 Mezzanine Connector J28 Table A 21 Mezzanine SAS Connector Pinout J28 Pin Direction S1 RX 0 S2 RX 0 S3 RX 1 S4 RX 1 S13 TX 1 S14 TX 1 S15 TX 0 S16 TX 0 G1 G9 GND All pins not listed are not connected ...

Page 81: ...ng of boot B 1 First Boot Menu The V7768 V7769 have a First Boot pop up menu enabling the user to on a one time basis select a drive device to boot from This feature is useful when installing from a bootable disk For example when installing an operating system from a CD enter the First Boot menu and use the arrows keys to highlight ATAPI CD ROM Drive Press ENTER to continue with system boot This f...

Page 82: ...on processor type and clock speed and allows the user to set the system s clock and calendar Use the left and right arrow keys to select other screens Below is a sample of the Main screen The information displayed on your screen will reflect your actual system Table B 2 BIOS SETUP UTILITY Main Advanced PCIPnP Boot Security Chipset Exit System Overview Use Enter TAB Or SHIFT TAB to Select a field U...

Page 83: ...o malfunction If problems are noted after changes have been made reboot the system and access the BIOS From the Exit menu select Load Failsafe Defaults and reboot the system If the system failure prevents access to the BIOS screens refer to Chapter 1 Installation and Setup for instructions on clearing the CMOS Table B 3 BIOS SETUP UTILITY Main Advanced PCIPnP Boot Security Chipset Exit Advanced Se...

Page 84: ...ample screen of the PCI PnP menu options in your system may be different from those shown Table B 4 BIOS SETUP UTILITY Main Advanced PCIPnP Boot Security Chipset Exit Advanced PCI PnP Settings NO lets the BIOS configure all the devices in the system YES lets the operating system configure Plug and Play PnP devices not required for boot if your system has a Plug and Play operating system Select Scr...

Page 85: ...ation Also available in this screen are Boot Settings which allow the user to set how the basic system will act for example support for PS 2 mouse and whether to use Quick Boot or not Table B 5 BIOS SETUP UTILITY Main Advanced PCIPnP Boot Security Chipset Exit Boot Settings Configure Settings During System Boot Select Screen Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC ...

Page 86: ...r password Table B 6 BIOS SETUP UTILITY Main Advanced PCIPnP Boot Security Chipset Exit Security Settings Install or Change the password Select Screen Select Item Enter Change F1 General Help F10 Save and Exit ESC Exit Supervisor Password Not Installed User Password Not Installed Change Supervisor Password Change User Password Clear User Password Boot Sector Virus Protection Disabled AMI BIOS Secu...

Page 87: ...system and access the BIOS From the Exit menu select Load Failsafe Defaults and reboot the system If the system failure prevents access to the BIOS screens refer to Chapter 1 Installation and Setup for instructions on clearing the CMOS Table B 7 BIOS SETUP UTILITY Main Advanced PCIPnP Boot Security Chipset Exit Advanced Chipset Settings Intel Montara GML NorthBridge chipset Configuration options S...

Page 88: ...d PCIPnP Boot Security Chipset Exit Exit Options Exit system setup after saving the changes F10 key can be used For this operation Select Screen Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC Exit Save Changes and Exit Discard Changes and Exit Discard Changes Load Optimal Defaults Load Failsafe Defaults AMI BIOS Exit Menu 002 53 C Copyright 1985 2002 American Megatrends I...

Page 89: ...of the BIOS Setup Utility allows the LAN to be enabled Table C 1 shows the Chipset Menu Use the arrow keys to highlight the Onboard Devices Configuration Select Onboard FP LAN and enter until the option is set to Enabled Press F10 to Save and Exit the BIOS Setup Utility This will allow the LAN to be a boot device Table C 1 Enable the Front Panel LAN for Remote Booting BIOS SETUP UTILITY Main Advan...

Page 90: ...enu Press F11 at the very beginning of the boot cycle which will access the First Boot menu Selecting Network IBA Abaco Slot to boot from the LAN in this screen applies to the current boot only At the next reboot the V7768 V7769 will revert back to the setting in the Boot menu Table C 2 Boot from LAN BIOS First Boot Menu Using the arrow keys highlight Network IBA Abaco Slot and press ENTER key to ...

Page 91: ...top of the screen Initializing Intel R Boot Agent Abaco v1 2 40 PXE 2 1 Build 085 WfM2 0 Press Ctrl S to enter Setup Menu Once you press CTRL S the Boot Agent setup menu will appear PXE is the boot option available on the V7768 V7769 You can change the settings for the Setup Prompt and Setup Menu Wait Time You can either enable or disable the prompt and you can set the amount of wait time for the ...

Page 92: ...NTENTS ARE PROVIDED AS IS WITH NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED INCLUDING BUT NOT LIMITED TO WARRANTIES OF DESIGN MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ALL OTHER LIABILITY ARISING FROM RELIANCE ON ANY INFORMATION CONTAINED HEREIN IS EXPRESSLY DISCLAIMED Abaco Systems Information Centers Americas 1 866 652 2226 866 OK ABACO or 1 256 880 0444 Inte...

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