Omni 56K Smart User’s Guide
5-26
Command Sets
Table 5-13 Extended S-Registers "ATSn=x"
COMMAND BIT DEC HEX
FUNCTION
AND
DESCRIPTION
REF.
8
8
ATX18
X1
16
10
ATX2
X2
24
18
ATX3
X3
32
20
ATX4
X4
40
28
ATX5, error control result code is enabled
(default).
X5
48
30
ATX6, error control result code is enabled.
X6
56
38
ATX7, error control result code is enabled.
X7
6
0
0
Displays the result code in numeric format (see
S35.7).
V0
64
40
Displays the result code in verbose format
(default).
V1
7
0
0
The modem returns the result code (default).
Q0
128
80
The modem does not return the result code (see
also S40.1).
Q1
bit dec
hex
Bit-mapped
register.
S24=
6-4 16-112
10-70
Speaker
volume
control, increments of 16 in
decimal value.
L0-3
S25=
0 to 255 0-FF
Specify the time delay that the DTR signal
needs to be OFF before it is recognized, in 10
ms units. If S25=0, the delay time is set to 4 ms.
+000
dec
hex
RTS/CTS
delay.
+000
S26=
0 to 255 0-FF
Set the delay, in 10 millisecond units between
the RTS and the modem's CTS response in
synchronous mode (see '&Rn' command).
&Rn
bit dec
hex
Bit-mapped
register.
+156
0-2
Modem error control.
0
0
No error control.
&K0
S27=
1
1
MNP4 + MNP3 (see also S41.0).
&K1
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