3. STD Bus Interface
30
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An STD 32 backplane is required. The STD-80 backplane does not support the bus
exchange protocol (DREQx* and DAKx*).
•
A ZT 89CT39, or equivalent bus arbiter, is needed to manage ZT 8904 access to the
STD bus resources. The arbitration may also be built directly on to the permanent
master if a ZT 8904 is not used for this function.
Multiple Master Reset
The ZT 8904, configured for single master operation, is automatically reset with a
precision voltage monitoring circuit, watchdog timer, local pushbutton reset, and the
STD bus pushbutton reset signal, PBRESET* (P48). In response to any of these
signals, the ZT 8904 initializes local peripherals and activates the STD bus system
reset, SYSRESET* (P47).
In a multiple master system, a ZT 8904 configured as a permanent master operates the
same as a ZT 8904 operating in a single master architecture. A ZT 8904 configured as
a temporary master manages reset differently. A temporary master does not monitor
PBRESET* and does not generate SYSRESET*. Instead, a temporary master ignores
PBRESET* and monitors SYSRESET*. This enables the temporary masters to be reset
when the permanent master generates SYSRESET*. This also enables the pushbutton
reset on the temporary master to reset only the temporary master while the pushbutton
on the permanent master resets the entire system.
