IC901:
ADSST-DR-11Z (DIGITAL P.C.B.)
Network microprocessor
*
No replacement part available.
L1 DATA
MEMORY
EXTERNAL PORT
FLASH, SDRAM CONTROL
L1 INSTRUCTION
MEMORY
VOLTAGE REGULATOR
WATCHDOG TIMER
OTP MEMORY
RTC
COUNTER
SPORT0
SPORT1
UART0
NFC
PPI
SPI
PORT J
GPIO
PORT H
GPIO
PORT G
GPIO
PORT F
TIMER7·1
TIMER0
TWI
HOST DMA
EMAC
UART1
JTAG TEST AND EMULATION
INTERRUPT
CONTROLLER
DMA
CONTROLLER
DMA
ACCESS
BUS
BOOT
ROM
DEB
DCB
EAB
16
ACCESS BUS
PERIPHERAL
USB
Pin No.
Port Name
Function Name
ON
Detail of Function
I/O
Logic
1
A1
GND
GND
2
A2
PF9/PPI_D9/
RSCLK1/%SPISEL6%
DBG_LED1
B
Data
Deb
u
g inp
u
t/o
u
tp
u
t port1 (DIP_SW1 inp
u
t/LED1 o
u
tp
u
t)
3
A3
PF11/PPI_D11/TFS1/CZM
BF_WCK1
I
Clock
I2S word clock inp
u
t
4
A4
SCL
BF_I2C_SCL
O
Clock
EEPROM / VideoENC / Apple_Coprocessor / Clock I2C data
5
A5
PF13/PPI_D13/
TSCLK1/%SPISEL3%/CUD
BF_BCK1
I
Clock
I2S Bit clock inp
u
t
6
A6
PF15/PPI_D15/DR1SEC/UAR-
T1RX/TACI3
---
7
A7
PH0/ND_D0/MIICRS/RMIICRSDV/
HOST_D0
RMII_CRSDV
I
Data
PHY: RMII carrier sence/DataValid
8
A8
PH2/ND_D2/MDIO/HOST_D2
PHY_MDIO
B
Data
PHY: Management channel clock
9
A9
PH4/ND_D4/MIITXCLK/RMII_REF-
CLK/HOST_D4
RMII_REFCLK
I
Clock
PHY: RMII reference clock (50MHz)
10
A10
XTAL
23.04MHz crystal
11
A11
CLKIN
23.04MHz crystal
12
A12
PH8/%SPISEL4%/ERXD1/HOST_
D8/TACLK2
RMII_RXD1
I
Data
PHY: RMII RXD1
13
A13
PH10/%ND_CE%/ERXD2/HOST_
D10
PHY_N_FDX
I
Data
PHY: PHY_NWAYEN
14
A14
RTXI
I
Clock
15
A15
RTXO
O
Clock
16
A16
VDDRTC
17
A17
GND
18
A18
USB_XO
O
Clock
19
A19
USB_XI
I
Clock
24MHzUSB clock inp
u
t
20
A20
GND
21
B1
PF7/PPI_D7/DR0SEC/ND_D7A/
TACI1
USB_FSSEL
O
Data
I2S (USB) FS select
22
B2
PF8/PPI_D8/DR1PRI
DBG_LED0
B
Data
Deb
u
g inp
u
t/o
u
tp
u
t port0 (DIP_SW0 inp
u
t/LED0 o
u
tp
u
t)
23
B3
PF10/PPI_D10/RFS1/%SPISEL7% PLD_N_RST
O
L act
PLD reset
24
B4
SDA
BF_I2C_SDA
B
Data
I2C data (EEPROM / Apple_Coprocessor / Clock)
25
B5
PF12/PPI_D12/
DT1PRI/%SPISEL2%/CDG
BF_SDO1
O
Data
I2S1 data o
u
tp
u
t
26
B6
PF14/PPI_D14/DT1SEC/UART1TX APPLE_N_RST
O
L act
Apple certification chip reset (L: reset)
27
B7
PH1/ND_D1/ERXER/HOST_D1
RMII_RXER
I
Data
PHY: RMII receive error
28
B8
PH3/ND_D3/ETXEN/HOST_D3
RMII_TXEN
O
Clock
PHY: RMII TX enable
80
RX-V671/HTR-6064/RX-A710
RX-V671/HTR-6064/
RX-A71
0
DRAFT